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Sequential logic circuits

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Presentation on theme: "Sequential logic circuits"— Presentation transcript:

1 Sequential logic circuits

2 Sequential logic circuits
Outline Sequential Circuit Models Asynchronous Synchronous Latches Flip-Flops CS Digital Logic Sequential logic circuits

3 Sequential logic circuits
The main characteristic of combinational logic circuits is that their output values depend on their present input values. Sequential logic circuits differ from combinational logic circuits because they contain memory elements so that their output values depend on both present and past input values CS Digital Logic Sequential logic circuits

4 Sequential logic circuits
Sequential circuits can be Asynchronous or synchronous. Asynchronous sequential circuits change their states and output values whenever a change in input values occurs. Synchronous sequential circuits change their states and output values at fixed points of time, i.e. clock signals. CS Digital Logic Sequential logic circuits

5 Sequential Circuit Models
Universal model CS Digital Logic Sequential logic circuits

6 Sequential logic circuits
Combinational circuit model Mealy machine model Moore machine model CS Digital Logic Sequential logic circuits

7 Sequential logic circuits
Memory Devices Latches A latch is a memory element whose excitation signals control the state of the device. A latch has two stages set and reset. Set stage sets the output to 1. Reset stage set the output to 0. Flip-flops A flip-flop is a memory device that has clock signals control the state of the device. CS Digital Logic Sequential logic circuits

8 Sequential logic circuits
Latch Flip-flop CS Digital Logic Sequential logic circuits

9 Sequential logic circuits
Inverter Chains Ring oscillator CS Digital Logic Sequential logic circuits

10 Sequential logic circuits
Latches RS Latch The RS latch is the basic memory element consists of two cross-coupled NOR gates. It has two input signals, S set signal and R reset signal. It also has two outputs Q and Q'; and two states, a set state when Q = 1 and a reset state when Q = 0 (Q' = 1) CS Digital Logic Sequential logic circuits

11 Sequential logic circuits
1 S R Q hold 1 0 reset 1 set unstable CS Digital Logic Sequential logic circuits

12 Sequential logic circuits
1 S R Q unstable 1 0 reset 1 set hold CS Digital Logic Sequential logic circuits

13 Sequential logic circuits
Flip-Flops A flip-flop is a level-sensitive latch with a clock input. RS flip-flop Q+ = S +R'Q CS Digital Logic Sequential logic circuits

14 Sequential logic circuits
T (Toggle) flip-flop D Q(t) Q(t+1) Hold 1 Toggle Q+ = TQ' + T'Q CS Digital Logic Sequential logic circuits

15 Master Slave Flip-Flops
A master slave flip-flop consists of two latches and an inverter. Master-slave RS flip-flop CS Digital Logic Sequential logic circuits

16 Master-Slave JK Flip-Flops
CS Digital Logic Sequential logic circuits


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