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2. 2 This powerpoint slides are reproduced from hand-written manuscripts for Verilog-based Introduction to Digital Logic - ECE241 by Prof. Stephen Brown, University of Toronto, Canada with permission ACKNOWLEDGEMENT

3. 3 4. Number Representation and Arithmetic Circuits

4. 4 Number Bases (1/7) Number Bases Base 10: 0, 1, …, 9(10 digits) Base 2: 0, 1(2 digits) Base 8: 0, 1, …, 7(8 digits) Base 16: 0, …, 9, A, B, C, D, E, F(16 digits) Quality Sixteen: (16) 10 (10000) 2 (20) 8 (10) 16

5. 5 Number Bases (2/7) Converting Between Number Bases –Base 2  Base 10 (1111000) 2 = 1  2 6 + 1  2 5 + 1  2 4 + 1  2 3 + 0  2 2 + 0  2 1 + 0  2 0 = 64 + 32 + 16 + 8 = (120) 10 –Base 10  Base 2 divide by 2 repeatedly.

6. 6 Number Bases (3/7) Example DecimalBinary Value

7. 7 Number Bases (4/7) A = 570: 28 1 1: 14 0 2: 7 0(111001) 3: 3 1= 2 0 + 2 3 + 2 4 + 2 5 4: 1 1= 1 + 8 + 16 + 32 5: 0 1= 57

8. 8 Binary  Octal (8) –Just group 3 bits because 2 3 = 8. –Eg. 57 = (111 001) 2 = 7 1 –Eg. 120 = (1 111 000) 2 = 1 7 0 (170) 8 = 8 2 + 7 x 8 1 + 0 = 64 + 56 = (120) 10 Check 1 x 8 0 + 7 x 8 1 = 1 + 56 = 57 Number Bases (5/7)

9. 9 Number Bases (6/7) Binary  Hexadecimal (16) –Just takes groups of 4 bits. –Eg. 120 = (111 1000) 2 7 8 (78) 16 = 7 x 16 1 + 8 x 16 0 = 112 + 8 = 120

10. 10 Number Bases (7/7) Addition (57) 10 (111001) 2 Check 2 6 + 2 2 +(11) 10 +(001011) 2 = 64 + 4 68 1000100 = 68 57 111001 Check 13 001101 2 0 + 2 2 + 2 4 + 2 5 + 2 6 +47 + 101111= 1 + 4 + 16 + 32 + 64 117 1110101= 117 1 1 1 1 1 1

11. 11 Addition Circuits –1-bit addition: –Multibit addition: Each of these columns has inputs C i, x i, y i, and output S i, C i+1 0011 +0+1+0+1 00010110 CSCSCSCS xyCS 00110011 01010101 00010001 01100110 C3C3 C2C2 C1C1 x3x3 x2x2 x1x1 x0x0 +y3y3 y2y2 y1y1 y0y0 C4C4 S3S3 S2S2 S1S1 S0S0 Adders (1/4)

12. 12 Adders (2/4) CiCi xixi yiyi C i+1 SiSi 0000111100001111 0011001100110011 0101010101010101 0001011100010111 0110100101101001 00011110 01 1111 C i x i yiyi C i+1 = C i x i + x i y i + C i y i Often called majority function, which means it is 1 if any two, or all 3 inputs = 1.

13. 13 Adders (3/4) This is called a full adder. half adder C3C3 C2C2 C1C1 x3x3 x2x2 x1x1 x0x0 +y3y3 y2y2 y1y1 y0y0 C4C4 S3S3 S2S2 S1S1 S0S0

14. 14 Adders (4/4) Called a ripple-carry adder. C3C3 C2C2 C1C1 x3x3 x2x2 x1x1 x0x0 +y3y3 y2y2 y1y1 y0y0 C4C4 S3S3 S2S2 S1S1 S0S0

15. 15 Signed Numbers 5 – 3 = 2 Question: Can we solve this using addition? -3 = 13 = (2 4 ) - 3 01015 +1101-3 00102 5 > 00000000111111110000000011111111 00001111000011110000111100001111 00110011001100110011001100110011 01010101010101010101010101010101 < 2 0 1 2 3 4 5 6 7 -8 -7 -6 -5 -4 -3 -2 To subtract 1, we need to add 15, -1 = 1111 Signed Numbers (1/5)

16. 16 Signed Numbers (2/5) So, the idea is to just add and wrap around to 0000 after 1111. This is equivalent to adding with a carry- out. -1 = 1111 -3 = 1101 Scheme is called 2’s complement representation. –With n-bits00…00 to 011…1 + ve 10…00 to 111…1 - ve In general, -k = 2 n – k

17. 17 Signed Numbers (3/5) Example: 5-bits k = 12; -12 = 2 5 - 12 = 32 - 12 = 20 = 10100 –Check: Note: Producing 2 n – k is awkward. There is a shortcut: complement all bits and add 1. Eg. -12: 12 = 01100  10011  10100 11 01100 +10100 00000

18. 18 Signed Numbers (4/5) Question: Why does this work? 2 n – k = (2 n – 1) – k + 1 (2 n – 1) = n 1 digits Shortcut to find –k is to complement all bits in k, then add 1. 1111…111 -… … +1

19. 19 Shortest Cut – Let k i be the first bit (from the right) of k that has the value 1. Then 2 n – k So, starting at the right, keep all 0s, and keep the first 1, then complement the rest. eg. -12 (n = 5) =100…000…00 -0…00 …10…00 11 01100(12) +10100(-12) 00000 Signed Numbers (5/5)

20. 20 Adder/Subtractor Adder/Subtractor Circuitx +/- y

21. 21 Verilog Code for Arithmetic Circuits (1/5) There are lots of ways to write this code! 1.Structural code module FA (input C i, x, y, output C 0, S); assign S = C i ^ x ^ y; assign C 0 = (x == y)? x : C i ; endmodule This is the carry- out function of a FA (same as xy + xC i + yC i ) xyCS 00110011 01010101 00010001 01100110

22. 22 Verilog Code for Arithmetic Circuits (2/5) 2.We could build a ripple-carry adder using FA modules (eg. 4- bit) module add4 (C in, X, Y, C out, S); input C in ; input [3:0] X, Y; output C out ; output [3:0] S; wire [1:3] C; FA bit0 (C in, X[0], Y[0], C[1], S[0]); FA nit1 (C[1], X[1], Y[1], C[2], S[1]); FA bit3 (C[3], X[3], Y[3], C out, S[3]); endmodule This produces … * Instances of FA. *

23. 23 3.Can use a “for” loop: module add4 (... ); always @ (C in, X, Y); begin C[0] = C in ; for (k = 0; k < 4; k = k+1) begin S[k] = X[k] ^ Y[k] ^ C[k]; C[k+1] = (X[k] == Y[k])? X[k] : C[k]; end C out = C[4]; end endmodule The verilog compiler “unrolls” your loop, which is exactly the same as if you typed four statements for S[0], …, S[3] and four statements for C[4], …, C[1]. Key: The “for” loop is not executed as a loop. There is no concept of program execution here! … Verilog Code for Arithmetic Circuits (3/5)

24. 24 Verilog Code for Arithmetic Circuits (4/5) 4.Using the verilog + operator. (OR = 1) always @ (C in, X, Y) begin C[0] = C in ; for (k = 0; k < 4; k = k + 1) {C[k+1], S[k]} = X[k] + Y[k] + C[k]; C out = C[4]; end {f, g} means create a 2-bit vector such that vector[1] = f, vector[0] = g. This is called concatenation. This gives exactly the same circuit as the previous “for” loop (it has the same meaning). … * *

25. 25 Verilog Code for Arithmetic Circuits (5/5) 5.Finally, the compiler knows how to make a multibit adder. always @ (X, Y, C in ) {C out, S} = X + Y + C in ; This also produces the 4-bit adder. However, the structure of the adder is not specified in the code. This is called Behavioral code (as opposed to Structural). …