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ECE574 – Lecture 3 Page 1 MA/JT 1/14/03 MOS structure MOS: Metal-oxide-semiconductor –Gate: metal (or polysilicon) –Oxide: silicon dioxide, grown on substrate MOS capacitor: two-terminal MOS structure Si substrate Oxide (SiO 2 ) Metal gate (Al) Body or substrate terminal Gate terminal
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ECE574 – Lecture 3 Page 2 MA/JT 1/14/03 MOS Energy Band Diagram: Ideal Modified work function (q M, q S ): energy required to take electron from Fermi level to conduction band of oxide Work functions for metal and Si are equal (ideal) qMqM ECEC EiEi E Fp EVEV qSqS E C,oxide E Fm oxide bandgap 8ev Oxide Metalp-type Si
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ECE574 – Lecture 3 Page 3 MA/JT 1/14/03 MOS Energy Band Diagram: Ideal E Fp EVEV ECEC MOS (p-type) Both gate and substrate connected to 0V (gnd) Fermi levels must line up at equilibrium No band bending necessary No built-in field or depletion region formed EiEi E Fm qFqF F = Fermi potential (difference between E F and E i in bulk) qMqM qSqS
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ECE574 – Lecture 3 Page 4 MA/JT 1/14/03 MOS Energy Band Diagram: Real Work function difference between Al and Si –Depends on material used, doping, etc. At equilibrium, Fermi levels must line up qMqM ECEC EiEi E Fp EVEV qSqS E C,oxide E Fm oxide bandgap 8ev Oxide Metalp-type Si
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ECE574 – Lecture 3 Page 5 MA/JT 1/14/03 MOS Energy Band Diagram E Fp EVEV ECEC MOS (p-type) Bands must bend for Fermi levels to line up Part of voltage drop occurs across oxide, rest occurs next to O-S interface Amount of bending is equal to work function difference: q M - q S EiEi E Fm qFqF qSqS F = Fermi potential (difference between E F and E i in bulk) S = surface potential
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ECE574 – Lecture 3 Page 6 MA/JT 1/14/03 Flat-Band Voltage Flat-band voltage –Built-in potential of MOS system –Work function difference: V FB = m - S –Apply this voltage to “flatten” energy bands Example: –P-type substrate: q s = 4.9 eV –Aluminum gate: q m = 4.1 eV –What is flatband voltage? –Assume intrinsic silicon has q s = 4.7 eV. What is the Fermi potential for the substrate?
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ECE574 – Lecture 3 Page 7 MA/JT 1/14/03 MOS capacitor operation Assume p-type substrate (n-type will be the opposite) Three regions of operation –Accumulation (V G < 0) –Depletion (V G > 0 but small) –Inversion (V G >> 0) P-type Si substrate V B = 0 VGVG
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ECE574 – Lecture 3 Page 8 MA/JT 1/14/03 Accumulation Negative voltage on gate: attracts holes in substrate towards oxide Holes “accumulate” on Si surface (surface is more strongly p-type) Electrons pushed deeper into substrate P-type Si substrate V G < 0 V B = 0 E Fp EVEV ECEC EiEi E Fm qV G
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ECE574 – Lecture 3 Page 9 MA/JT 1/14/03 Depletion Positive voltage on gate: repels holes in substrate –Holes leave behind negatively charged acceptor ions Depletion region forms: devoid of carriers –Electric field directed from gate to substrate Bands bend downwards near surface –Surface becomes less strongly p-type (E F close to E i ) P-type Si substrate V G > 0 V B = 0 E Fp EVEV ECEC EiEi E Fm qV G Depletion region E ox
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ECE574 – Lecture 3 Page 10 MA/JT 1/14/03 Depletion region depth Calculate thickness x d of depletion region –Find charge dQ in small slice of depletion area –Find change in surface potential to displace dQ by distance x (Poisson equation): xdxd dx dQ
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ECE574 – Lecture 3 Page 11 MA/JT 1/14/03 Depletion region depth (cont.) –Integrate perpendicular to surface –Result:
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ECE574 – Lecture 3 Page 12 MA/JT 1/14/03 Depletion region charge Depletion region charge density –Due only to fixed acceptor ions –Charge per unit area
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ECE574 – Lecture 3 Page 13 MA/JT 1/14/03 Inversion Increase voltage on gate, bands bend more Additional minority carriers (electrons) attracted from substrate to surface –Forms “inversion layer” of electrons Surface becomes n-type P-type Si substrate V G >> 0 V B = 0 E Fp EVEV ECEC EiEi E Fm qV G electrons E ox
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ECE574 – Lecture 3 Page 14 MA/JT 1/14/03 Inversion Definition of inversion –Point at which density of electrons on surface = density of holes in bulk –Surface potential is same as F, but different sign EVEV E Fp EiEi ECEC qFqF q S = -q F Remember: q F = E F - E i
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ECE574 – Lecture 3 Page 15 MA/JT 1/14/03 Inversion (2) What is depletion region depth at inversion? General equation: What is S at inversion? At inversion: This is the maximum size for depletion region
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ECE574 – Lecture 3 Page 16 MA/JT 1/14/03
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ECE574 – Lecture 3 Page 17 MA/JT 1/14/03 MOS transistor Add “source” and “drain” terminals to MOS capacitor Transistor types –NMOS: p-type substrate, n + source/drain –PMOS: n-type substrate, p + source/drain source drain P-substrate N+N+ N+N+ NMOS source drain N-substrate P+P+ P+P+ PMOS
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ECE574 – Lecture 3 Page 18 MA/JT 1/14/03 MOS Transistor Important transistor physical characteristics –Channel length L –Channel width W –Thickness of oxide t ox L W t ox
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ECE574 – Lecture 3 Page 19 MA/JT 1/14/03 MOS transistor operation Simple case: V D = V S = V B = 0 –Operates as MOS capacitor When V GS <V T0, depletion region forms –No carriers in channel to connect S and D sourcedrain P-substrate V B = 0 V g < V T0 V d =0V s =0 depletion region
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ECE574 – Lecture 3 Page 20 MA/JT 1/14/03 MOS transistor operation When V GS > V T0, inversion layer forms Source and drain connected by conducting n-type layer (for NMOS) sourcedrain P-substrate V B = 0 V g > V T0 V d =0V s =0 depletion region inversion layer
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ECE574 – Lecture 3 Page 21 MA/JT 1/14/03
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