1. EE 435 Spring 2015 http://class.ece.iastate.edu/djchen/ee435/2015
Lecture 1
Course Outline

2. Instructors Lecture Instructor: Laboratory Instructor: Degang Chen
Office: 2134 Coover Hall
VoicePhone:
Laboratory Instructor:
Yifu Guo
Office: 3011 Coover Hall
Voice Phone: 515-  

3. students

4. Poll on time availability
Would like to use Wed 6pm as primary
R11 as secondary
Would like everyone to come to W6, at least part of the time
If one cannot finish on W, or has to leave early, one can continue on R11

5. Office hours Regular office hours: MWF11-12
I’ll post my weekly schedule on my door, you can pick any open slot and sign up for an office visit
If there are 3 or more students make a request, we can have a group “help” session
Time:

6. Analog Integrated Circuit Design
Course Information:
Required Text:
Analog Integrated Circuit Design
by T. Carusone, D. Johns and K. Martin, Wiley, 2011
Errata:
Focus materials:
Amplifier design:
Chapters 3, 4, 5, 6
Data converter:
Chapters 15, 16, 17
Other materials:
Noise, references, comparators
Chapters 7, 9, 10

7. Course Information: Reference Texts:
CMOS Analog Circuit Design, 3rd Edition
by Allen and Holberg, Oxford, 2012
Analysis and Design of Analog Integrated Circuits-5th Edition
Gray,Hurst,Lewis and Meyer, Wiley, 2009

8. Course Information:
Reference Materials:

9. Catalog Description
E E 435. Analog VLSI Circuit Design. (Same as Cpr E 435.) (3-3) Cr. 4. S. Prereq: 324, 330, 332, and either EE 322 or Stat 330.
Basic analog integrated circuit and system design including design space exploration, performance enhancement strategies, operational amplifiers, references, integrated filters, and data converters. Non-major graduate credit.

10. Course Coverage by Topics
Current mirrors and basic amplifiers
Operational amplifier design and compensation
Comparator design
Voltage references
Noise analysis
Switches
Nyquist rate D/A and A/D converters

11. Relation to Grad Level Courses
EE501: CMOS analog IC design (operational amplifier design)
EE505: Data Converter Design
EE506: phase locked loops
EE507: VLSI Communication Circuits
EE508: Integrated Filter Design
EE504: power management
EE509: analog and mixed-signal testing and built-in self-test
EE514: RF and Microwave Circuits, low noise amplifiers

12. Grading Homework: 15% Midterm Exam: 15~20% Final Exam: 30~35%
Lab and Lab Reports: 10%
Project 1 Report: 10%
Project 2 Report: 15%

13. Laboratory There will be weekly laboratory experiments.
The laboratory will be either on electronic measurements or on VLSI CAD design and simulation.
A written report after each topic is completed

14. Design Projects Everyone will design a two-stage op amp
Teams will design various digital to analog converters or analog to digital converters
Additional details will be given after relevant material is covered in class.
The option will exist to have these projects fabricated through the MOSIS program.

15. Additional Comments E-mail communication is strongly encouraged
Personal visit to my office is also encouraged
Either academic or non-academic
Anytime is OK
Classroom participation is strongly encouraged
I prefer an interactive class
I feel nervous when the class is too quiet
So, do me a favor and ask questions and answer questions

16. First week lab Electronic measurements Extra Cadence simulation lab
Required for everybody
Finish in one week
Report due at beginning of lab in second week
Extra Cadence simulation lab
Not required for people with B or better in EE330
Show simulation results to any instructor