1. Computer Organization
ECE 445
Computer Organization
Course Web Site
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2. Textbooks Computer Organization, 5th ed.
ECE 445
Textbooks
Computer Organization, 5th ed.
Carl Hamacher, Zvonko Vranesic, Safwat Zaky
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3. Computer Functional Units
ECE 445
Computer Functional Units
I/O
Processor
Input
Arithmetic & Logic
Memory
Output
Control
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4. Course Organization Computer Structure (Ch 1)
ECE 445
Course Organization
Computer Structure (Ch 1)
Instruction Sets & Addressing Modes (Ch 2)
Control Unit Design (Ch 7)
Computer Arithmetic (Ch 6)
Memory (Ch 5)
Input/Output (Ch 4)
Pipelining (Ch 8)
Embedded Systems (Ch 9)
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5. Computer Information (Binary)
ECE 445
Computer Information (Binary)
(Machine) Instructions
(Machine Language) Programs
Data
2's complement
BCD
ASCII
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6. I/O Input Output Serial Communications Keyboard Mouse Microphone
ECE 445
I/O
Input
Keyboard
Mouse
Microphone
Camera
Scanner
Output
Display
Printer
Speakers
Serial Communications
Network
Modem
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7. Memory Primary Organization Secondary Hierarchy
ECE 445
Memory
Primary
Random Access Memory (RAM)
Read Only Memory (ROM)
Organization
Word
Address
Read/Write
Secondary
Magnetic
Disks
Tape
Optical Disks
Hierarchy
Cache
Main
Virtual
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8. ALU Arithmetic Logic Registers Addition Subtraction Multiplication
ECE 445
ALU
Arithmetic
Addition
Subtraction
Multiplication
Division
Comparison
Logic
AND OR
NOT
XOR
Registers
Store
Shift
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9. Control Unit Coordinates/Directs other Units Computer Operation Input
ECE 445
Control Unit
Coordinates/Directs other Units
Computer Operation
Input
Program/Data stored in Memory
Processing
Information fetched into Registers
Processed by ALU
Output
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10. History First Generation (miliseconds)
ECE 445
History
First Generation (miliseconds)
von Neumann (stored program)
Vacuum Tubes
Magnetic Core Memory
Teletypes/Magnetic Tapes
Second Generation (microseconds)
Transistor
High-level Languages (Fortran)
Compilers
I/O Processors
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11. History Third Generation Fourth Generation (nanoseconds)
ECE 445
History
Third Generation
Integrated Circuits
Microprogramming
Parallelism/Pipelining
Operating Systems (sharing)
Cache/VM
Fourth Generation (nanoseconds)
VLSI (Single Chip Microprocessor)
Personal Computers
Networks
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12. Computer Functional Units
ECE 445
Computer Functional Units
I/O
Processor
Input
Arithmetic & Logic
Memory
Output
Control
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13. Control Unit Arithmetic Logic Unit MAR - Memory Address Register
ECE 445
Control Unit
Arithmetic Logic Unit
MAR - Memory Address Register
MDR - Memory Data Register
PC - Program Counter
IR - Instruction Register
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14. Computer Instructions
ECE 445
Computer Instructions
Assembly Language
MOVE NUM1,R1
MOVE #1,R2
ADD #1,R1
ADD R1,R2
Register Transfer Notation
R1  [NUM1]
R2  1
R1  1 + [R1]
R2  [R1] + [R2]
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15. The “fetch-execute cycle”
Fetch the instruction whose address is in the program counter
Increment the PC so it holds the address of the next instruction
Execute the instruction just fetched
Fetch the next instruction
Etc.
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16. Arithmetic/Logic Unit
Control Unit
Instruction Register
Data Register
instruction fetch
Program Counter
Data Register
instruction
Memory
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17. Instruction Fetch CPU PC IR Memory MAR MDR Memory Control
instruction address
Bus
instruction
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18. Arithmetic/Logic Unit
Control Unit
instruction execute
Instruction Register
Data Register
Program Counter
Data Register
data
Memory
data
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19. Instruction Execution
CPU IR R1
Memory
MAR
MDR
Memory Control
operand (data) address
Bus
data
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20. Example Instruction Fetch Execute MOVE NUM1,R1 MAR  [PC]
ECE 445
Example Instruction
MOVE NUM1,R1
Fetch
MAR  [PC]
PC  [PC] + 1
MDR  [MEM([MAR])]
IR  [MDR]
Execute
MAR  NUM1
MDR  [MEM([MAR])]
R1  [MDR]
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21. Another Example Fetch Execute ADD #1,R1 MAR  [PC] PC  [PC] + 1
ECE 445
Another Example
ADD #1,R1
Fetch
MAR  [PC]
PC  [PC] + 1
MDR  [MEM([MAR])]
IR  [MDR]
Execute
R1  1 + [R1]
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22. Single-Bus Structure Input Output Memory Processor 11/10/2018 445_01
ECE 445
Single-Bus Structure
Input
Output
Memory
Processor
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23. System Software Compiler Assembler Text Editor Operating System
ECE 445
System Software
Compiler
High-level Language  Machine Language
Assembler
Assembly Language  Machine Language
Text Editor
Keyboard Input  File
Operating System
Control Sharing & Interaction
Assign & Manage Resources
Memory
Disk Space
Handle I/O
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24. Memory Performance Main Processor Memory Cache Memory 11/10/2018
ECE 445
Memory Performance
Main
Memory
Processor
Cache
Memory
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25. Processor Clock Period (P) Rate (R) R = 1/P 1 GHz = 1/1ns CLK
ECE 445
Processor Clock
CLK
Period (P)
Rate (R)
R = 1/P
1 GHz = 1/1ns
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26. Performance Equation Processor Execution Time (T)
ECE 445
Performance Equation
Processor Execution Time (T)
Number of Machine Language Instructions (N)
Average Steps per Machine Instruction (S)
Clock Rate (R)
MIPS: Millions of instructions per second
Megaflops: Millions of floating point operations per second
Megahertz: Millions of clock cycles per second
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27. Pipelining F1 E1 I1 F2 E2 I2 F3 E3 I3 Sequential Execution F1 E1 I1 F2
ECE 445
Pipelining F1 E1 I1 F2 E2 I2 F3 E3 I3
Sequential Execution F1 E1 I1 F2 E2 I2 F3 E3 I3
Pipelined Execution
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28. Parallel Processing Parallel Execution Multiprocessors Multicomputers
ECE 445
Parallel Processing
Parallel Execution
Superscalar
Multiprocessors
Shared-Memory
Multicomputers
Message-Passing
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29. Multiprogramming Multiprocessing, multitasking.
A system that provides for concurrent execution
of multiple programs, i.e., manages multiple processes
Programs share use of the processor (take turns).
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30. Multiprogramming Multiprocessing: 1) Multiprogramming
2) Parallel processing (multiple processors)
depending on context
Multitasking:
1) Multiprogramming
2) A particular form of multiprogramming
depending on context
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31. Figure 1.4. User program and OS routine sharing of the processor.
Printer
Disk OS
routines
Program t t t t t t 1 2 3 4
Time 5
Figure User program and OS routine sharing of the processor.
Figure User program and OS routine sharing of the processor.
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32. CISC vs RISC Complex Instruction Set Computers (CISC)
ECE 445
CISC vs RISC
Complex Instruction Set Computers (CISC)
Smaller N
Larger S
Reduced Instruction Set Computers (RISC)
Larger N
Smaller S
Easier to Pipeline
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