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Published byΖηναις Μιχαηλίδης Modified over 6 years ago
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HKN ECE 342 Review Session 2 Anthony Li Milan Shah
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MOSFET’s NMOS PMOS
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MOSFET Operating Point
Three regions of operation: Cutoff (VG < VT): ID = 0 Linear/Triode (VG > VT, VDS < VGS - VT): 𝐼𝐷 = 𝜇𝑛𝐶𝑜𝑥( 𝑊 𝐿 )(( 𝑉 𝐺𝑆 − 𝑉 𝑇 ) 𝑉 𝐷𝑆 − 𝑉 𝐷𝑆 2 2 ) Saturation (VG > VT, VDS > VGS - VT): 𝐼𝐷 = 𝜇𝑛𝐶𝑜𝑥 𝑊 𝐿 ½ 𝑉𝐺𝑆 − 𝑉 𝑇 2 (1+ λ 𝑉 𝐷𝑆 ) Note: 𝜇 𝑛 𝐶 𝑜𝑥 𝑊 𝐿 = 𝑘 ′ 𝑊 𝐿 =𝑘
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MOSFET Incremental Model
Transconductance: 𝑔 𝑚 = 2 𝐼 𝐷 𝑉 𝑂𝑉
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Gain Calculation Av = -GMRout
GM = Small signal transconductance, ratio of iout to vin ROUT = Equivalent incremental output resistance
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Common Amplifier Topologies
Diode-tied Transistor Common Source/Drain/Gate Common Source with Degeneration Common Drain with Modulation Cascode Diode Tied Transistor
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Diode-Tied Transistor
ROUT = 1 𝑔 𝑚 || 𝑟 𝑑𝑠 ≈ 1 𝑔 𝑚 for 𝑔 𝑚 𝑟 𝑑𝑠 ≫1 or 𝑟 𝑑𝑠 →∞ Diode Tied Transistor
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Common Source/Drain/Gate
𝑅𝑂𝑈𝑇 = 𝑅 𝑆 || 𝑟 𝑑𝑠 || 1 𝑔 𝑚 𝐺 𝑚 = 𝑔 𝑚 𝑅𝑂𝑈𝑇 = 𝑅 𝐷 || 𝑟 𝑑𝑠 𝐺 𝑚 = 𝑔 𝑚 𝑅𝑂𝑈𝑇 = 𝑅 𝐷 || 𝑟 𝑑𝑠 𝐺 𝑚 =− 𝑔 𝑚 Common Source. Your basic amplifier topology. Notice the infinite input resistance and inverted gain. Common Drain. Also known as a level shifter. These make great buffers. Source follower? Common Gate. good current buffer i believe.
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Degeneration When a resistance is “viewed” through the drain, it appears bigger by a factor related to the transconductance. 𝑅𝑂𝑈𝑇 = 𝑅 𝐷 || ( 𝑟 𝑑𝑠 + 𝑅 𝑆 + 𝑔 𝑚 𝑟 𝑑𝑠 𝑅 𝑠 ) 𝐺𝑚 = 𝑔𝑚 1 + 𝑔 𝑚 𝑅 𝑆 Note that these formulas simplify to the common source ones if Rs is zero. Also remember that these equations rely on rds not being infinity.
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Modulation Resistances seen through the source seem smaller:
𝑅𝐼𝑁 = 𝑅 𝑆 𝑔 𝑚 (1 + 𝑅 𝐷 𝑟 𝑑𝑠 ) for gmrds >> 1 𝑅 𝐼𝑁
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Cascode 𝑅𝑂𝑈𝑇 = 𝑅 𝐷 || ( 𝑟 𝑑𝑠2 + 𝑅 1 + 𝑔 𝑚2 𝑟𝑑𝑠2 𝑅 1 )
𝑅𝑂𝑈𝑇 = 𝑅 𝐷 || ( 𝑟 𝑑𝑠2 + 𝑅 𝑔 𝑚2 𝑟𝑑𝑠2 𝑅 1 ) 𝑅 1 =( 𝑟 𝑑𝑠1 + 𝑅 𝑆 + 𝑔 𝑚1 𝑟 𝑑𝑠1 𝑅𝑆) 𝐺𝑚 = 𝑔𝑚1 1 + 𝑔 𝑚1 𝑅 𝑆 𝑅 1
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BJT
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Regions of Operation Three regions of operation:
Cutoff: VE > VB < VC Saturation: VE < VB > VC Forward Active: VE > VB > VC VT = kt/q IC = ꞵIB IE = IC + IB Ꞵ = gmR𝜋
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BJT Small Signal Model
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Terminal Impedance RC = ro RB = Rℼ RE = 𝑅ℼ ꞵ+1 Diode-Tied = 𝑅ℼ ꞵ+1
Diode Tied Transistor
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Common Emitter/Collector/Base
𝑅𝑂𝑈𝑇 = 𝑅𝜋+𝑅𝐵 ꞵ+1 ||𝑅𝐸 𝑅𝐼𝑁 = 𝑅𝐵+𝑅𝜋 +(ꞵ+1)𝑅𝐸 𝐺𝑚 = − ꞵ+1 𝑅𝜋+ 𝑅 𝐵 𝑅𝑂𝑈𝑇 = 𝑅𝑐 || 𝑟𝑜 𝑅𝐼𝑁 = 𝑅𝜋+𝑅𝐵 ꞵ+1 𝐺𝑚 = ꞵ 𝑅𝜋+𝑅𝐵 𝑅𝑂𝑈𝑇 = 𝑅𝑐 || 𝑟𝑜 𝑅𝐼𝑁 = 𝑅𝜋+𝑅𝐵 𝐺𝑚 = ꞵ 𝑅𝜋+𝑅𝐵
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Degeneration When a resistance is “viewed” through the collector, it appears bigger by a factor related to the transconductance. 𝐺 𝑚 = 1 𝑅 𝐵 +𝑅𝜋 ꞵ + ꞵ+1 ꞵ 𝑅 𝐸 RIN = RB+R𝜋 +(ꞵ+1)RE
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Modulation Resistances seen through the Emitter seem smaller.
𝐺𝑚 = − ꞵ+1 𝑅𝐵+𝑅𝜋 𝑅𝐼𝑁 = 𝑅𝐵+𝑅𝜋 +(ꞵ+1)𝑅𝐸
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Bode Plots Magnitude Pole: Roll down by 20 db/dec, 6 db/oct
Zero: Roll up by 20 db/dec, 6 db/oct Phase: arctan(ω/ωp) Usually -90° for poles, +90° for zeros ωugf = 20log|An| * ωpn where n is the pole located before unity gain frequency
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Miller Effect 𝐶 1 = 𝐶 𝑓 1+𝐴 𝐶 2 = 𝐶 𝑓 (1+ 1 𝐴 )
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Problem 1: Midterm 3 Fa17
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Problem 2: Midterm 2 Fa16
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Problem 3: Midterm 2 Fa16 A. 𝐺 𝑚 = 𝑔 𝑚 𝑔 𝑚 2 𝑔 𝑚 𝑔 𝑚 𝑔 𝑚 1 𝑔 𝑚 3 , 𝑅 𝑜𝑢𝑡 = 1 𝑔 𝑚 𝑟 𝑑 𝑠 𝑔 𝑚 2 𝑔 𝑚 4 𝑟 𝑑 𝑠 2 || 1 𝑔 𝑚 𝑟 𝑑 𝑠 𝑔 𝑚 1 𝑔 𝑚 3 𝑟 𝑑 𝑠 1 B. Refer to solutions
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