1. Propagation Time Delay
Rising propagation delay time:
Propagation delay =(Rising delay + Falling delay)/2

2. Single pole response of amplifier

3. Time delay due to dynamic response

4. Slew Rate of a Comparator
If the rate of rise or fall of a comparator becomes large, the dynamics may be limited by the slew rate.
Slew rate comes from the relationship,
i = Cdv/dt
where i is the current through a capacitor and v is the voltage across it.
If the current becomes limited, then the voltage rate becomes limited. Therefore for a comparator that is slew rate limited we have,
tp = ∆T =∆V/SR =(VOH- VOL)/2·SR
where
SR = slew rate of the comparator.

5. Find the propagation delay time of an open loop comparator that has a dominant pole at 103 radians/sec, a dc gain of 104, a slew rate of 1V/µs, and a binary output voltage swing of 1V. Assume the applied input voltage is 10mV.
Solution
The input resolution for this comparator is 1V/104 or 0.1mV. Therefore, the 10mV input is 100 times larger than vin(min) giving a k of 100. Therefore, we get
tp =1/103 ln(2·100/(2·100-1))
= 10-3 ln(200/199) = 5.01µs
For slew rate considerations, we get
tp =1/(2·1x106) = 0.5µs
Therefore, the propagation delay time for this case is the larger or 5.01µs.

6. Two-Stage Comparator
An important category of comparators are those which use a high-gain stage to drive their outputs between VOH and VOL for very small input voltage changes.
The two-stage op amp without compensation is an excellent implementation of a high-gain, open-loop comparator.

9. Driving Large Capacitive Load
Inverters
clean up
output
Typically added at latch output.

11. Chapter 10 Figure 07

14. Chapter 10 Figure 10

18. Input Noise on the Comparator
Problem:
Solution:
Introduce
Hysteresis

19. External Positive Feedback

20. Internal Positive Feedback

21. Chapter 10 Figure 14

22. Latched comparators Pre-amplification followed by a track-and-latch.
Pre-amplification is used to obtain high resolution and to minimize “kickback” effects.
Kickback: charge transfer in or out of the input side when the track-and-latch goes from track mode to latch mode.
Pre-amplification has moderate gains, or small gains for higher speed
Output of pre-amp is small to drive digital.
It is amplified during track-and-latch modes by positive feedback which regenerates the analog signal into a full-scalar digital signal.

23. The inputs are initially applied to the outputs of the latch.
Vo1’ = initial input applied to vo1
Vo2’ = initial input applied to vo2
Then positive feedback drives the higher of the two to digital 1 and the lower to digital 0

24. CMOS Latch

27. There are several comparator circuit in the book, here is one from a paper by
T.B. Cho and P.R. Gray, “A 10b, 20Msamples/s, 35mW pipeline A/D Converter,” IEEE J. Solid-State Circuits, vol. 30, no. 3, pp , March 1995.

28. When phi_1 is low:

29. When phi_1 is high: