1. Information Storage and Spintronics 13
Atsufumi Hirohata
Department of Electronic Engineering
15:00 Monday, 12/November/2018 (J/Q 004)

2. Quick Review over the Last Lecture
MRAM read-out :
MRAM STT write-in :
Bit line
Sensing current
Magnetic free layer
Magnetic tunnel /
spin-valve junctions
Insulator /
nonmagnet
Magnetic pin layer
Word line
Selection transistor
(MOSFET)
Parallel magnetisation ↓
Low resistant state “0”
Antiparallel magnetisation ↓
High resistant state “1”
Perpendicularly magnetised MRAM : *
** M. Oogane and T. Miyazaki, “Magnetic Random Access Memory,” in
Epitaxial Ferromagnetic Films and Spintronic Applications, A. Hirohata and Y. Otani (Eds.) (Research Signpost, Kerala, 2009) p. 335;
***

3. 13 Ferroelectric / Phase Change Random Access Memory
FeRAM
PRAM
ReRAM

4. Memory Types Rewritable Volatile Dynamic DRAM Static SRAM Non-volatile
MRAM
FeRAM
PRAM
Read only
Non-volatile
Static
PROM
Mask ROM
Read majority
(Writable)
Non-volatile
Static
Flash
EPROM * 4

5. Comparison between Next-Generation Memories* 5

6. Ferroelectric Random Access Memory (FeRAM)
In 1952, Dudley A. Buck invented ferroelectric RAM in his master’s thesis :
Utilise ferroelectric polarisations
Very fast latency : < 1 ns
CMOS process compatible
Relatively large cell size : 15 F 2
Destructive read-out * **

7. FeRAM Cells 1 1-transistor 1-capacitor type : 1-transistor type :*

8. FeRAM Cells 2 2-transistor 2-capacitor type :
Bit line 1
Bit line 2
Word line
Word line
Plate line
Bit line 1
Bit line 2
Capacitor V 1
Ferroelectric
capacitor 1
Ferroelectric
capacitor 2
Capacitor V 2
Plate line
FeRAM Writing operation
Reading operation
Prevent destructive read-out *

9. Requirements for Ferroelectric Materials
FeRAM cell structure :
Large residual polarisation
→ High recording density
Small dielectric constant
→ Read-out error reduction
Small coercive electric field
→ Low power consumption
High fatigue endurance
→ 10-year usage (> polarisation reversal)
High remanence
→ 10-year tolerance for data
Small imprint

10. Ferroelectric Materials
ABO3 type materials : *

11. Polarisation Hysteresis
For example, BaTiO3 : *

12. Applications 2-Mb FeRAM introduced by Fujitsu :*

13. Comparison between Next-Generation Memories* 13

14. Phase Change
In 1960s, Stanford R. Ovshinsky studied phase-change properties of chalcogenide
In 1969, Charles Sie demonstrated the feasibility for memory applications.
In 1999, Ovonyx was established for memory realisation :
512 Mbit (Samsung, 2006)
1 Gbit (Numonyx, 2009)
1.8 Gbit (Samsung, 2011) * **

15. Phase Change Random Access Memory (PRAM)
Required writing currents for several techniques dependent upon cell size :
Utilise phase change
Low resistivity : crystalline phase
High resistivity : amorphous phase
CMOS process compatible
Rewritability : 1,000 ~ 100,000 times
Destructive read-out * 15

16. PRAM Properties PRAM properties as compared with NOR-flash memory :** 16

17. PRAM Operation PRAM operation : **

18. PRAM Architecture PRAM architecture : **

19. Resistive Random Access Memory (ReRAM)
In 1997, Yoshinori Tokura found colossal magnetoresistance (CMR) :
In 2002, Sharp demonstrated 64-bit ReRAM with Pr0.7Ca0.3MnO3 :
Utilise large resistivity change
High endurance : ~ 10 12
Fast switching speed : < 1 ns
CMOS process compatible * **

20. ReRAM Operation Unipolar / bipolar operations : ***

21. ReRAM Operation Cycle
Oxygen vacancy can be repaired during the operation cycle : * **

22. ReRAM Demonstration Samsung (2004) : * Stanford (2011) : ***