1. ME4447/6405 Microprocessor Control of Manufacturing Systems and
Introduction to Mechatronics
Instructor: Professor Charles Ume
Lecture #9

2. Assembly Language

3. Reading Assignments
Reading assignments for this week and next week
Read Chapters 5-8 in Basic Microprocessors and the 6800, by Ron Bishop.
Chapter 5 Microcomputers-What Are They?
Chapter 6 Programming Concepts
Chapter 7 Addressing Modes
Chapter 8 M6800 Software
There will be questions and answers the rest of this week and next week based on your reading assignment.

4. Writing programs in Machine Language is extremely difficult
Why use Assembly Language?
HCS12 CPU can only understand instructions written in binary called Machine Language.
Writing programs in Machine Language is extremely difficult
Mnemonics are simple codes, usually alphabetic, that is representative of instruction it represents (example: LDAA [LoaD Accumulator A])
A program written using Mnemonic Instructions is called Assembly Language program
An Assembler can be used to translate Assembly Language program to Machine Language Program, and put it in S-Record Format.

5. Assembly Language Notations
Address: Common term for memory location. Always written in hexadecimal.
$4000 is the 4000th16 Memory Location (Note: “$” signifies hexadecimal)
LDAB $4000
Literal Value: A number used as data in a program indicated by “#”. Can be represented in the following ways:
#$FF = hexadecimal number FF
#%1011 = binary number 1011 (Note: “%” signifies binary)
#123 = decimal number 123
LDAB #$FF
A Literal Value can be stored in an address
Example: Literal Value #$FF can be stored in address $4000
STAB $4000
Example 2: Literal Value #$FE0A is stored in address $2000 (Note: #$FE is stored in address $2000 #$0A is stored in address $2001)
LDD #$FE0A
STD $2000

6. Assembly Language Directives
Directives: Instructions from the programmer to Assembler NOT to microcontroller
Example 1: ORG <address>
Store translated machine language instructions in sequence starting at given address for any mnemonic instructions that follow
ORG $1000
Example 2: END
Stop translating mnemonics instructions until another ORG is encountered
(Note: More will be covered in later lectures)

7. Assembly Language Format
(Note: Last three options are called Operands)
Data that the Assembly Directive uses Or
Blank if Mnemonic Instruction does not need Data
Offset Address used to modify Program Counter by a Mnemonic Instruction
Data that Mnemonic Instruction uses
Address where the Data that Mnemonic Instruction will use is stored
A Tab (8 white spaces) or Label
(Note: A Label is another Assembly Directive and will be covered in later lectures)
Assembly Directive Or
Mnemonic Instruction
Left margin of assembly program

8. ORG $0800
LDAA #$100A
- -
BNE Front E
LDAB $2F,Y
STAB $110C
Front INCX
SWI
END

9. In the previous slide, there were several options for the operand:
Addressing Modes
In the previous slide, there were several options for the operand:
Blank if Mnemonic Instruction does not need Data
Offset Address used to modify Program Counter by a Mnemonic Instruction
Data that Mnemonic instruction uses
Address were Data that Mnemonic instruction uses is stored
Which option a programmer uses is defined by the following addressing modes:
Inherent
Immediate
Extended
Indexed Indirect
Direct
Indexed
Relative
(Note: All instructions are not capable of all addressing modes.
Example: BLE [Branch if Less than or Equal to Zero] is only capable of Relative addressing mode)

10. Example: Programming Reference Guide Page 6

16. Blank if Mnemonic Instruction does not need Data
If Mnemonic Instruction does not need data then it uses Inherent Addressing Mode
Example: Write a program to clear accumulator A. Start programming at address $1000
Solution:
ORG $1000
CLRA
SWI
END
CLRA [ CLeaR accumulator A] is an instruction using Inherent Addressing
(NOTE: SWI [SoftWare Interrupt] is a mnemonic instruction which tells the 9SC32 to store the content of cpu registers on the stack. Sets the I bit (the interrupt bit) on the CCR. Loads the program counter with the address stored in the SWI interrupt vector, and resume program execution at this location. If no address is stored in the SWI vector, the main program will stop execution at this point. Used in this course to return control to Mon12 Program)

17. Data that Mnemonic instruction uses
The Mnemonic instruction is using Immediate Addressing mode if the operand is Data used by the instruction
Example: Write a program to load accumulator A with #$12. Start programming at address $1000
Solution:
ORG $1000
LDAA #$12 LDAA #$5BEE (Explain what happens)
SWI
END
LDAA is an instruction using Immediate Addressing mode in this example

18. Address were Data that Mnemonic instruction uses is stored
The following addressing modes apply if the operand is an Address containing Data used by Mnemonic instruction :
Direct
Data is contained in Memory locations $00 to $FF
Address is given as a single byte address between $00 to $FF
Instructions using Direct addressing has fastest access to memory
Example: LDAA $00
Loads accumulator A with Data value stored at memory location $00
Extended
Data is contained in Memory locations $0100 to $FFFF
Address is given as a two byte address between $0100 to $FFFF
Example: LDAA $2000
Loads accumulator A with Data value stored at memory location $2000

19. Example Problem 1
Example : Write a program to add the numbers 1010 and 1110.
Solution
ORG $1000
LDAA #$0A *Puts number $0A in acc. A
LDAB #$0B *Puts number $0B in acc. B
ABA *Adds acc. B to acc. A
STAA $00 *Stores results in address $00
SWI *Software interrupt
END
LDAB and LDAA use immediate addressing mode
STAA uses direct addressing mode

20. Address were Data that Mnemonic instruction uses is stored (Continued)
Indexed:
Data is located within Memory locations $00 to $FFFF
Example: Store content of $2003 in Register A
LDX #$2000
LDAA $03,X
Loads accumulator A with Data value stored at memory location $2003
X + $03 = $ $03 = $2003
(Note: LDX [ LoaD index register X])

21. Why is Indexed Addressing Mode needed?
Example: Store Data Value #$20 into memory locations $2000 to $3000
Without Indexed Addressing Mode
With Indexed Addressing Mode
ORG $1000
LDAA #$20
LDX #$2000
LOOP STAA $00,X
INX
CPX #$3001
BNE LOOP
SWI
END
ORG $1000
LDAA #$20
STAA $2000
STAA $2001 .
STAA $3000
SWI
END
Program on the Left is much longer than program on Right

22. Why is Indexed Addressing Mode needed? (Continued)
ORG $1000
LDAA #$20
LDX #$2000
LOOP STAA $00,X
INX
CPX #$3001
BNE LOOP
SWI
END
Note: LDAA[LoaD accumulator A]
LDX [ LoaD Index Register X]
STAA [ STore Accumulator A]
INX [ INcrement X]
CPX [ ComPare X]
BNE [Branch if Not Equal] ( is using relative addressing in conjunction with label “LOOP”)
LOOP, BNE LOOP, INX, and CPX #$3001 creates a loop.
Loop1: Data in accumulator A (#$20) is stored at $ $00
Data in X is incremented #$ #$0001 = #$2001
Data in X is compared to #$3001
Not equal so do another loop
Loop2: Data in Accumulator A (#$20) is stored at $2001
Data in X is incremented #$ #$0001 = #$2002
Etc…..

23. ORG $1000 LDY #$1001 LDAA #$20 LDX #$2000 LOOP STAA $00,X INX DECY
Why is Indexed Addressing Mode needed?
Example: Store Data Value #$20 into memory locations $2000 to $3000
ORG $1000
LDY #$1001
LDAA #$20
LDX #$2000
LOOP STAA $00,X
INX
DECY
BNE LOOP
SWI
END

25. Types of Indexed modes of Addressing
Indexed addressing may be implemented in multiple ways. HCS12 CPU uses X, Y, SP or PC as base index register for instruction. Offset is then added to base index register to form effective address.
Constant offset
5-, 9- or 16-bit signed offset (-16 to +15, -256 to +255, to )
5-Bit Constant Offset Indexed Addressing
Index mode uses 5-bit signed offset which is added to base index register (X, Y, SP or PC) to form effective address of memory location that will be affected by instruction. Offset ranges from -16 through +15. Majority of indexed instructions in real programming use offsets that fit in shortest 5-bit form of indexed addressing. Contents of base registers remain unchanged.
LDAA $00, X *load A with (X + $00)
The following three statements are equivalent:
STAA -8,X Note: offset given in decimal
STAA -$08,X Note: offset given in hex
STAA $FFF8,X Note: offset given as 16-bit number
Let X contain #$3000. After program executed, content of A will be stored at address (#$ #$08) = $2FF8

26. $FFF8 = = - #$0008

27. Types of Indexed modes of Addressing
9-Bit Constant Offset Indexed Addressing.
Uses 9-bit signed offset which is added to base index register (X, Y, SP or PC) to form effective address of memory location affected by instruction. Offset ranges from -256 through Contents of base registers are not changed after instruction is executed. MSB (sign bit) of offset is included in instruction postbyte and remaining 8 bits are provided as extension byte after instruction postbyte in instruction flow.
LDAA $FF, X *Assume X contains $1000 prior to instruct. Execut.
A6 E0 FF
LDAB -20, Y *Assume Y contains $2000 prior to instruct. Execut.
E6 E9 EC
First instruction will load A with value from ($ $FF) = $10FF
Second instruction will load B with value from ($2000 – 20) = $IFEC

28. Types of Indexed modes of Addressing
Accumulator Offset Indexed Addressing
In this indexed addressing mode, effective address is sum of values in base index register and unsigned offset in one of accumulator. Value in base index register is not changed. Indexed register can be X, Y, SP or PC and accumulator can be either 8-bit (A or B) or 16-bit (D)
A, B, or D accumulator added to base index register to form address
Content of accumulator is unsigned offset
LDAA B, X
A6 E5
Instruction adds B to X to form address from which A will be loaded. B and X are not changed by this instruction.

29. Detailed Explanation:
(Page 21)
Base index register rr X 00 Y 01 SP 10 PC 11
Detailed Explanation:
This is Indexed Addressing Mode with Accumulator Offset.
Opcode for LDAA is A6 for this mode.
From the table above, the formula for postbyte of this mode is: 111rr1aa
rr is 00 because Base Index Register is X
aa is 01 because Accumulator used for offset is B
= E5 in hex
Example: LDAA B, X
Ans: A6 E5

30. Types of Indexed modes of Addressing - Continued
Auto Pre-/Post-Increment/Decrement
Base index register (X, Y and SP) may be automatically incremented/decremented before or after instruction (Program Counter may not be used as base register)
No offset is available
May be incremented/decremented 1 to 8 times
Post-Increment (in ranges from 1 through 8):
LDX 2,SP+ *Index register X is loaded with contents of (Same as PULX) memory location in stack pointer, then stack EE B1 pointer is incremented twice
Pre-Increment (in ranges from 1 through 8):
LDX 2,+SP *Stack pointer is incremented twice,
EE A1 then Index register X is loaded with contents of memory location in stack pointer
Pre-Decrement (in ranges from -8 through -1):
STAA 1,-X *Index register X is decremented, then 6A 2F Accumulator A is stored in memory location stored in Index Register X

31. Indexed Addressing Mode Postbyte Encoding (xb)

32. Indexed Addressing Mode Postbyte Encoding (xb) - Continued

33. Why is Pre-/Post-Increment/Decrement Useful?
Example: Store Data Value #$20 into memory locations $2000 to $3000
Without Post-Increment
With Post-Increment
ORG $1000
LDAA #$20
LDX #$2000
LOOP STAA $00,X
INX
CPX #$3001
BNE LOOP
SWI
END
ORG $1000
LDAA #$20
LDX #$2000
LOOP STAA 1,X+
CPX #$3001
BNE LOOP
SWI
END
Note: “1” refers to the number of post increments, not an offset!
Program on the Left requires 1 more byte of program memory and takes 1 more cycle to execute per run through the loop than the program on the right. This may make a large difference when the program is large and complex or when dealing with values larger than 16-bits.

34. Types of Indexed modes of Addressing - Continued
16-Bit Constant Indirect Indexed Addressing
Indexed addressing mode adds 16-bit instruction-supplied offset to base indexed register to form address of memory location that contains pointer to memory location affected by instruction.
Instruction itself does not point to address of memory location to be acted on.
Square brackets distinguished this addressing mode from 16-bit constant offset indexing.
Example:
LDAA [10, X] or
LDAA [$0A, X]

35. Types of Indexed modes of Addressing - Continued
16-Bit Constant Indirect Indexed Addressing
ORG $1000
LDAB #$EE
STAB $0400 *#$EE stored at $0400
LDD #$0400
STD $5DBC *#$0400 stored at $5DBC & $5DBD
LDX #$5D00 *X contains #$5D00
LDAA [$BC, X] *#$BC added to value in X to form
…… …… address $5DBC. Address pointer $0400
…… fetched from memory at $5DBC. Value (EE) store in $0400 read & loaded in Acc. A
…… ……
SWI
END

36. Assembler

37. As stated before the Assembler translates an assembly language program into a machine language program
Format of machine language program
Instruction
Operand Or
Blank if instruction does not use Operands
Address where instruction is located
Opcode
Postbyte
(Note: This format is for Lecture and Tests only !! The real format the assembler outputs is “S19” and will be shown to you in Lab)

38. Postbyte and Opcode Reference
All Mnemonics and associated Op-codes can be found in Programming Reference Guide pages 6-19
Example: Programming Reference Guide Page 12 (Note: LDAA outlined in red)

39. Indexed Addressing Mode Postbyte Encoding (xb)

40. Indexed Addressing Mode Postbyte Encoding (xb) - Continued

41. Postbyte
Postbyte allows an op-code to be used for more than one instruction.
Determined from Tables 1, 3 or 4 in the programming reference guide
Instruction
Opcode
Postbyte
LDAA 0,X A6 00
LDAA $02,SP+ B1
LDAA B,Y ED
SUBB $1040,X E0 E2
SUBB D,Y EE
SUBB -14,X 12
Table 1 (Excerpt)

42. (Programming Reference Guide)

46. ORG $1000 LDAA #$0A LDAB #$0B ABA STAA $00 SWI END Hand Assembling
Example: Assemble the following Program
Address
Opcode
Postbyte
Operand
ORG $1000
LDAA #$0A
LDAB #$0B
ABA
STAA $00
SWI
END
$1000 A
$1002
C B
$1004
18 06
$1006 5A
$1008 3F
(Note: $1002 since $86 is now at $1000 and $0A is at $1001)

47. Example Problem 1 (revisited)
ORG $1000
LDAB #$0A *Load acc. B with number 0A
STAB $1100 *Store acc. B in address $1100
INCB *Increment acc. B by 1
ADDB $1100 *Add memory location $1100
*to acc. B
STAB $1090 *Store acc. B in address $1090
SWI *Software interrupt
END

48. Hand Assemble Example Problem 1 (Revisited)
Address
C A
1002 7B
1006 FB
1009 7B
100B 3F
Opcode
Postbyte
Operand
ORG $1000
LDAB #$0A
STAB $1100
INCB
ADDB $1100
STAB $1090
SWI
END

49. Example Problem 2
Write a short assembly language program that stores the content
of Port T in memory location $3000 after waiting for 0.05 seconds
for the input data.
Solution
Recall: One machine cycle = x 10-6 s (8 MHz Bus Clock)
We want the HCS12 to wait 0.05 s/0.125 x 10-6 s = 400,000 cycles
One good way to make the HCS12 wait is to create a loop.

50. Assume the number of loops needed to wait is 2 bytes
Wait Loop
LDY #$AD9C 2 cycles
LDD #$ cycles
LOOP ABA 2 cycles
CPX $ cycles
DEY 1 cycle
BNE LOOP 3 cycles
Assume the number of loops needed to wait is 2 bytes
( )*X + 4 = 400,000 cycles
X = 44,44410 = $AD9C
Note: These instructions are included to increase the operation time

51. Example 2 Solution
Solution
*Remember that Port T is input upon reset
ORG $1000
LDY #$AD9C *Load Y with 44,44410
LDD #$0000 *Clear Accumulator D
LOOP ABA *Add the contents of B to A
CPX $2000 *Compare X with the contents of
*$2000
DEY *Decrement Y
BNE LOOP *Branch to LOOP if Y is not equal
*to zero
LDAB $ *Load acc. B with content of $0240
STAB $ *Store content of acc. B in $3000
SWI *Software Interrupt
END

52. Homework
Homework 1
Write an assembly language program to clear the internal RAM in the MC9S12C32.
Write a program to add even/odd numbers located in addresses $0800 through $0900.
Homework 2
Write a program to find the largest signed number in a list of numbers stored in address $0A00 through $0BFF. Repeat for an unsigned number.

53. QUESTIONS???