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Status of n-XYTER read-out chain at GSI
Rahul Arora GSI, Darmstadt GEM-TPC Meeting,18th November 2009
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n-XYTER : Neutron- X, Y, Time, Energy Readout ASIC
Front-End: 128 channels Front end for either polarity input signals Charge sensitive pre-amp and peak detector Time stamping with 1 ns LSB, 2ns resolution Peak detection and analogue storage (10 bit electronic resolution) Purely data driven, autonomous hit detection (self triggered) Average per channel hit rate 160kHz with 10% dead time (determined by pile-up on slow channel) Readout: Per channel analogue energy and digital time stamp FIFO (1ns resolution) De-randomizing, sparcifying Token Ring readout at 32 MHz
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Data Driven Front-End: Asynchronous Channel Trigger
Detection of Statistical, Poisson distributed signals trigger timestamp reg. comparator Time Walk Compensation circuit FAST shaper 18.5 ns peaking PDH reset charge preamp dig. FIFO charge input SLOW shaper (2 stages) 140 ns peaking time Peak detector & hold, free running pulse height output analogue FIFO Asynchronous registry and storage in 4-level fifo guarantees data loss < 4% when read-out through token ring
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n-XYTER Front End Topology
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Power Consumption preamplifier 7.4 mW fast shaper 2.5 mW
slow shaper stage mW slow shaper stage mW discriminator mW peak detector and hold mW analogue FIFO mW Overall we find about mW/channel air-cooling needed and installed for the tests
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Experimental Built-in Safety-Belts with First Submission
Testability and Diagnostics Individual analogue test channel Built in test pulse generator Programmable mask for every channel Programmable, forced trigger of PDH for every channel (check signal pedestal) Programmable dead time Diagnostic counters for pile-up and token statistics Backup Previsions / Safety Every individual channel may be shut off Clock signals derived on chip may be fed in separately Time stamp clock may be reduced without change of readout clock Various parts may be shut off In addition to global threshold, bit programmable local threshold
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N-XYTER FEB Dimensions: 91 x 95 mm 8 layers Revision C
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Readout chain The readout chain starts with the Revision C board having 50 micron silicon strip detector on it having detector capacity around pF. The source for the detector is Am140 The next step is the ROC board connected to the FEB by flat cable. The DC voltage supplied to the ROC and FEB is as follows For ROC : Voltage - 5 V Current - 3 Amps For FEB : Voltage - 5 V Current – 2.0 Amps The versions of software and hardware used are ROC hardware : ROC software : The ROC is communicated using ROCsoft software in a PC running linux. The analysis is done using go4 sofware 4.3.1 The FEB is maintained at a constant temperature of 20 °C using air cooler.
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Testing of one chip board
The pulse shapes are studied from the slow and fast shaper using the oscilloscope. The one chip board with silicon strip detector with pitch of 50 micron is tested using Am140 . The results are analyzed using go4 software.
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Go4 plots for ADC count and channels
ADC count for all channels
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Event signal with baseline subtraction and test pulse signal
noise noise Test Pulse Am140
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Overall status & Known bugs
Operational tests: Full chain is operational Drift with temperature, but if stabilized works for days Dedicated tests (with developer) Cross talk (?) may be present (mixed layout?) Temperature dependency of E-output (work below 60 °C)
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Outlook 2-chip board will be attacked as for as possible
Input to be changed to gas-detector Data for the engineering run nearly complete Submission foreseen before end of 2009
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