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Demonstration of a High Performance Active Router DARPA Demo - 9/24/99

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Presentation on theme: "Demonstration of a High Performance Active Router DARPA Demo - 9/24/99"— Presentation transcript:

1 Demonstration of a High Performance Active Router DARPA Demo - 9/24/99
Dan Decasper, John DeHart, Ralph Keller, Jonathan Turner, Sumi Choi and Tilman Wolf Washington University, Applied Research Lab (best viewed in presentation mode) Jonathan Turner - 11/17/2018

2 Motivation Technology advances adding new functionality to internet routers. logic capabilities growing much faster than IO packet classification, per flow queueing becoming common single chip packet processing engines with 16 processors now becoming available Application-specific processing in routers could become routine. active networking is one way to exploit trend alternative model signalling and resource reservation packet classification and flow-specific routing Key challenge is application software. Need better experimental platforms for researchers.

3 Towards an Open Internet Router
Modular components. ability to swap components - both hardware and software routing, signalling, management software address lookup and packet classification queueing and packet scheduling open, documented and straightforward interfaces Dynamic insertion of application-specific processing. active networking model and others High performance. gigabit links and scalability to large numbers of ports packet processing rates of at least a million/second per link application-specific processing on large fraction of traffic need credible demonstrations to influence commercial practice

4 Active Router Hardware
Control Processor global coordination & control routing protocols build routing tables and other information needed by SPCs first level code server reprogrammable for active processing ANPEs IPPs LCs Switch OPPs CP AN Processing Element APIC Pentium Sys. FPGA 32-64 MB Cache NB Input Port Processor VCI OUT

5 Cell Processing ANPEs IPPs LCs Switch OPPs CP 3 4 6 4

6 Packet Processing Switch ANPEs IPPs LCs OPPs CP Sys. FPGA APIC Pentium
Cache NB 9 2 6 Sys. FPGA APIC Pentium Cache NB 9

7 Principal Data Flows Through PE Kernel
Packet Classification and Routing Packet + Flow Id IPv4/6 Header Processing IP Packets Plain Packets Kernel Plugins Active Packets . . . Active Function Dispatcher Driver Packet Scheduler Driver . . . . . . SAPF Packet Selector/ Dispatcher . . . . . . . . . Resource Controller Std. proc. for “plain” IP packets. classification & routing, header processing, output queueing Active packets move through configured kernel plugins. active function dispatcher passes packets to instances of plugin objects instantiates objects or triggers download of plugin class, as needed streamlined processing of SAPF packets using pre-established state

8 System Level Software Organization
anetd Java VM ANTS Active Plugin Loader Plugin Requestor Plugin DB Controller Policy Controller Security Gateway ANN Manager Plugin DB Key DB Routing & Signalling Control Processor Kernel Code Server Active Code DB Security & Policy Controller Switch Fabric Processing Elements Policy Rules

9 Physical Configuration
SE Processor Module APIC System FPGA Connectors Optoelectronics Transmission Coder & Decoder Fiber jumper to front panel Main Circuit Board

10 Active Congestion Control for Video
Based on wavelet-based encoding method (WaveVideo) up to hundreds of distinct frequency subbands (33) low frequencies: general image definition high frequencies: image details Active WaveVideo plugin detects congestion discards packets in high frequency subbands first Better performance than layered multicast requires large number of multicast groups reacts too slowly to congestion ( several seconds)

11 WaveVideo Scaling 33011 bytes (33) 25239 bytes (30) 17179 bytes (27)

12 “Logical” Demonstration Configuration
Video Display 1 Video Display 2 Video Display 3 P Video Source ANPE ANPE Cross Traffic Source 1 Cross Traffic Source 2 Cross Traffic Sink Code Server Key Server

13 Video Performance (light cross traffic)
Original Video “Plain” Queueing Active Queueing MPEG video player required for playback.

14 Video Performance (heavy cross traffic)
Original Video “Plain” Queueing Active Queueing MPEG video player required for playback.

15 Demo Instrumentation (simplified)
no loss plain queueing high frequency subbands low frequency subbands grey level shows amount of data received white: nothing received black: everything received active dropping time

16 Demonstration Start Video Source Cross Traffic Source 1
Video Display 1 Video Display 2 Video Display 3 Cross Traffic Sink Cross Traffic Source 2 Code Server Key Server ANPE

17 Light Cross Traffic - “Plain” Queueing
Video Source Cross Traffic Source 1 Video Display 1 Video Display 2 Video Display 3 Cross Traffic Sink Cross Traffic Source 2 Code Server Key Server ANPE

18 Light Cross Traffic - “Plain” Queueing
First Display (no cross traffic) Second Display (with cross traffic) Third Display (with cross traffic)

19 Heavy Cross Traffic - “Plain” Queueing
Video Source Cross Traffic Source 1 Video Display 1 Video Display 2 Video Display 3 Cross Traffic Sink Code Server Key Server ANPE Cross Traffic Source 2

20 Heavy Cross Traffic - “Plain” Queueing
First Display (no cross traffic) Second Display (light cross traffic) Third Display (heavy cross traffic)

21 Light Cross Traffic - Active Queueing
Video Source Cross Traffic Source 1 Video Display 1 Video Display 2 Video Display 3 Cross Traffic Sink Cross Traffic Source 2 Code Server Key Server ANPE P

22 Light Cross Traffic - Active Queueing
First Display (no cross traffic) Second Display (with cross traffic) Third Display (with cross traffic)

23 Heavy Cross Traffic - Active Queueing
Video Source Cross Traffic Source 1 Video Display 1 Video Display 2 Video Display 3 Cross Traffic Sink Code Server Key Server ANPE P Cross Traffic Source 2

24 Heavy Cross Traffic - Active Queueing
First Display (no cross traffic) Second Display (light cross traffic) Third Display (heavy cross traffic)

25 Bursty Cross Traffic - “Plain” Queueing
Video Source Cross Traffic Source 1 Video Display 1 Video Display 2 Video Display 3 Cross Traffic Sink Cross Traffic Source 2 Code Server Key Server ANPE 2.4 MB bursts, 2 second idle time

26 Bursty Cross Traffic - “Plain” Queueing
First Display (no cross traffic) Second Display (with cross traffic) Third Display (with cross traffic)

27 Bursty Cross Traffic - Active Queueing
Video Source Cross Traffic Source 1 Video Display 1 Video Display 2 Video Display 3 Cross Traffic Sink Cross Traffic Source 2 Code Server Key Server ANPE P 2.4 MB bursts, 2 second idle time

28 Bursty Cross Traffic - Active Queueing
First Display (no cross traffic) Second Display (with cross traffic) Third Display (with cross traffic)

29 Credits Sumi Choi Ed Spitznagel Ralph Keller Dan Decasper Dave Taylor
Dave Richard John Dehart Tilman Wolf


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