1. Ruggedized Camera Encoder

2. Agenda Team Introduction Project Description Initial Requirements
System Architecture
Electrical Design
Software Design
Mechanical Design
Future Work
Lessons Learned
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3. Team Introduction Matthew Hornyak– Mechanical Engineer
Alonzo Moreno – Mechanical Engineer
Jordan O’Connor – Electrical Engineer
Lennard Streat – Computer Engineer
Kyle Jason – Electrical Engineer (PM)
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4. Project Description
A Ruggedized Camera Encoder (RCE) is a compact and robust system that analyzes a stream of image data in real-time.
This system will eliminate the need for post processing.
Real-world applications are desired by the customer such as, police vehicles or military uses.
Deliver a working prototype that will acquire HD 1080p 30fps image data.

5. Initial Requirements General Customer Requirements
Pull 1080p 30fps Video from CoaXPress Camera
Portable
Ruggedized/Waterproof
Interface with D3 Design Core
I/O (HDMI, SSDs, SD card, USB, etc.)
Multiple Cameras
Real-time Video Analytics (Object recognition, Event triggering)
General Engineering Requirements
High Speed Transceivers
SoC FPGA
I/O Ports and Protocols
Performance Constraints
Environmental Constraints
Misc. Constraints
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6. System Architecture
A Ruggedized Camera Encoder (RCE) is a compact and robust system that analyzes a stream of image data in real-time. Typically, video analytics are completed using post processing techniques on a unit that is separate from the camera stream. This system will eliminate the need for post processing which cuts down on turnaround time and the need for a secondary system. Currently, the encoder used is more ideal for low-end applications and not real-world applications desired by the customer such as, police vehicles or military uses. The encoder should also be easily able to interface with other devices and not just cameras.
The goal of this project is to deliver a working prototype that will have a small enclosure (tabletop) with two tethered camera inputs, acquiring HD p 30fps image data. The system will be capable of processing the image data in real-time running different video analytics algorithms. It will be capable of streaming compressed image data over GigE to a standard video client for diagnostics through the D3 Design Core module.
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7. Electrical Design: FPGA
Cyclone V SoC
Peripheral Part Selection
Reference Design
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8. Electrical Design: FPGA cont.
DDR3 section of Schematics
Design Complexity
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9. Electrical Design: CoaXPress
HDMI
CXP Equalization – EqcoLogic ICs
HSMC Interface – XCVRs & LVTTL
ADC System – Power of CXP (PoCXP)
Physical Layer – PCB Design, I/O & Power
CoaXPress HSMC functional diagram.
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10. CoaXPress: Equalization
A high-level depiction of the CoaXPress protocol, from an interface perspective.
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11. CoaXPress: HSMC Interface
Three Major Signal Groups
High-Speed Transceiver Data Lines (2x/channel)
Low-Speed Uplink (1x/channel)
PoCXP Power Control Signal (1x/channel)
I2C Data & Clock Lines (PoCXP Sense)
HDMI IP Signals
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12. CoaXPress: PoCXP Subsystem
PoCXP control circuit. This circuit is duplicated for each CXP input channel; 4 channels.
The PoCXP sense signals are each connected to two 4-Channel ADS1015 Analog to Digital Converters.
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13. CoaXPress Subsystem: Physical Design
(Left) Power Tree. (Right) 3D View of CXP HSMC PCB design.
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14. Software Design

15. Software: Continued Three Major Parts:
Camera Interfacing (Transceiver)
Decoding and Storage
Display Video Stream (And Stored Data)
Tools: Altera Quartus II, Qsys, Altera Embedded Design Suite
Languages: Verilog (Qsys system and Blocks), C (SoC scripts)
Software currently under development

16. Mechanical Design: IP67 IP First Digit (Ingress of Solid Objects)
Second Digit (Ingress of Liquids)
No protection
... 4
Protected against solid objects over 1.0mm e.g. wires.
Protected against splash water from any direction. 5
Limited protection against dust ingress. (no harmful deposit)
Protected against low pressure water jets from any direction. Limited ingress permitted. 6
Totally protected against dust ingress.
Protected against high pressure water jets from any direction. Limited ingress permitted. 7
N/A
Protected against short periods of immersion in water. 8
Protected against long, durable periods of immersion in water. 9K
Protected against close-range high pressure, high temperature spray downs.

17. Mechanical Design: 1st Design

18. Mechanical Design: 2nd Design
$550 in parts

19. Mechanical Design: Final Design
CXP HSMC
Heat Dissipation Tray
Tray
Access Panel
HDD Tray
$470 in parts

20. Mechanical Design: Heat Analysis

21. Future Work Mechanical: Fabrication of the Parts
Arrange Final Placement of Internal Components
Heat, Force, and IP67 Testing
Electrical:
Finish FPGA Board Schematics and PCB
Finish CXP board PCB
Integrate Both Boards into System
Software:
Complete Transceiver Testing
Implement ARM Control of FPGA

22. Lessons Learned
Avoid setting unrealistic goals (smaller steps in deliverables)
Know when to move forward
Working remotely is not ideal
Rely less on customer for mission critical components
Product design process
System integration

23. Project Status and Questions
Research complete
Product design almost complete
Design almost ready for implementation
Questions?