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Digital Logic & Design Dr. Waseem Ikram Lecture No. 34.

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Presentation on theme: "Digital Logic & Design Dr. Waseem Ikram Lecture No. 34."— Presentation transcript:

1 Digital Logic & Design Dr. Waseem Ikram Lecture No. 34

2 Recap State Assignment
Flip-flop input table & K map for 1st assignment

3 Recap Moore Machine State Diagram Next-State Table
J-K flip-flop Input Table Karnaugh Maps Implementation Timing diagram

4 Recap Mealy Machine State Diagram Next-State Table State Assignment
J-K flip-flop Input Table Karnaugh Maps Implementation Timing diagram Output

5 Serial In/Serial Right/Serial Out Operation

6 Serial In/Serial Left/Serial Out Operation

7 Serial In/Shift Right/Serial Out Register

8 Timing diagram of a Serial In/Shift Right/Serial Out Register

9 Bi-directional, 4-bit Shift register

10 Timing diagram of a Bi-directional, 4-bit Shift register

11 Serial In/Parallel Out Operation

12 74HC164, 8-bit Serial In/Parallel Out Shift Register

13 Timing diagram of a 74HC164, 8-bit Serial In/Parallel Out Shift Register

14 Parallel In/Serial Out Operation

15 4-bit Parallel In/Serial Out Shift register

16 74HC165, 8-bit Parallel In/Serial Out Shift Register

17 Parallel In/Parallel Out Operation

18 A D-flip-flop based 4-bit Parallel In/Parallel Out Register

19 74HC195, 4-bit Parallel In/Parallel Out Shift Register

20 Rotate Right Operation

21

22 Rotate Left Operation

23 4-bit Johnson Counter

24 Sequence of states of a 4-bit Johnson Counter
Clock Pulse Q0 Q1 Q2 Q3 1 2 3 4 5 6 7

25 4-bit Ring Counter

26 Sequence of states of a 4-bit Ring Counter
Clock Pulse Q0 Q1 Q2 Q3 1 2 3

27 Shift Registers Serial In/Shift Right/Serial Out (fig 1)
Serial In/Shift Left/Serial Out (fig 2) D flip-flop based Serial Shift Reg. (fig 3a) Timing diagram (fig 3b) Universal Serial register (fig 4a) Timing diagram (fig 4b)

28 Shift Registers Serial In/Parallel Out (fig 5)
Serial In/Parallel Out 74HC164 (fig 6a) Timing diagram (fig 6b) Parallel In/Serial Out (fig 7) Circuit diagram Parallel In/Serial Out (fig 8) 74HC165 (fig 9)

29 Shift Registers Parallel In/Parallel Out (fig 10)
Parallel In/Parallel Out circuit (fig 11) 74HC195 (fig 12) 74HC194 (fig 13) Universal Shift reg.

30 Rotate Operations Rotate Right Operation (fig 14)
Rotate Left Operation (fig 15) Johnson Counter (fig 16, tab 1) Ring Counter (fig 17, tab 2)


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