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Chapter 4 The Von Neumann Model An Hong han@ustc.edu.cn 2016 Fall
Lecture on Introduction to Computing Systems Chapter 4 The Von Neumann Model An Hong Fall School of Computer Science and Technology 2018/11/18
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Big Idea #2: How do we get the electrons to do the work?
Application Algorithm & Data Structure Language Software 指令集体系结构 (Machine Architecture, ISA) Hardware Microarchiture Now, You are Here. Logic and IC Device Computer System: Layers of Abstraction 2 2018/11/18
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Bottom up approach Now, You are Here. Transistor 2018/11/18
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Computing and Microprocessor History
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Computation without electricity
Abacus (公元前500年,中国) Table abacus (reproduction) and jetons Germany 17th century Loan of Michael R. Williams, L Abacus China c Loan of Gwen and Gordon Bell, B Soroban Japan c Loan of Gwen and Gordon Bell, B Counting Frame Early 20th century Gift of Gwen and Gordon Bell, B141.80 Schoty Russia Early 20th century Gift of Warren Yogi, 2018/11/18
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Computation without electricity
Sectors 2018/11/18
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Computation without electricity
Slide Rules Pickett circular slide rule Japan c Loan of Gwen and Gordon Bell, B Slide rule US c Gift of Lynn Yarbrough, X121.82 Mannheim slide rule France c Loan of Gwen and Gordon Bell, B203.82 Lord’s calculator England c Loan of Gwen and Gordon Bell, B123.80 Fuller’s Rule US 1921 Gift of University of Illinois, X250.83A 2018/11/18
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Computation without electricity
Charles Babbage, 1791 – 1871,England 1822 – Designed the Difference Engine for computing navigational tables 1833 – Designed the Analytical Engine that had the basic components used in a modern computer – Work on Difference Machine but technology too primitive to build it. In 1991 the Science Museum in London built it Babbage’s second Difference Engine under construction at the Science Museum, London Credit: Computer History Museum 2018/11/18
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图灵机:计算机的理论模型 计算机的理论模型是由英国数学家阿兰·图灵(Alan Mathison Turing)在1936年发表的一篇论文“论可计算数及其在判定问题中的应用(On Computable Numbers with an Application to the Entscheidungs Problem)”中提出的。因此,当美国计算机协会ACM在1966年纪念电了计算机诞生20周年,图灵的有历史意义的论文发表30周年的时候,决定设立计算机界的第一个奖项“图灵奖”,以纪念这位计算机科学理论的奠基人。 2018/11/18
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重要的计算机科学技术奖 图灵奖(A.M. Turing Award):ACM设立于1966年,是计算机界最负盛名的奖项,有“计算机界诺贝尔奖”之称。1966年设立 对计算机事业作出重要贡献的个人,获奖者的贡献必须是在计算机领域具有持久而重大的技术先进性。 图灵奖对获奖者的要求极高,评奖程序也极严,一般每年只奖励一名计算机科学家,只有极少数年度有两名以上在同一方向上做出贡献的科学家同时获奖。 目前图灵奖由英特尔公司和google公司赞助,奖金为250,000美元。 计算机先驱奖(Computer Pioneer Award), IEEE—CS设立于1980年。 获奖者的成果必须是在15年以前完成的。这样一方面保证了获奖者的成果确实已经得到时间的考验,不会引起分歧;另一方面又保证了这个奖的得主是名副其实的“先驱”,是走在历史前面的人。 2018/11/18
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The First Electronic Computers
, J. Presper Eckert and John Mauchly at the Moore School of the University of Pennsylvania built the world’s first operational electronic, general purpose computer—ENIAC(Electronic Numerical Integrator and Calculator). ENIAC was funded by the United States Army and became operational during World War II. ENIAC was used for computing artillery firing tables Eckert and Mauchly 2018/11/18
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The First Electronic Computers
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The First Electronic Computers
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The First Electronic Computers
Technology: 18,000(17468) Vacuum tubes,70,000 resistors,10,000 capacitors,6,000 switches Programmed: plug board and switches, from 1 hour to 1 day to program Speed: 1,800 instructions/sec, 5000 operations/sec I/O: cards, lights,switches,plugs Floor space: 3,000 ft3,U shaped, 100 feet(25m) long, 10 feet(2.75m) high, and 3 feet(1m) deep. It consumed 140 kilowatts of power. 2018/11/18
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重要的计算机科学技术奖 Eckert-Mauchly奖( Eckert-Mauchly Award ),ACM和IEEE-CS联合授予,设立于1979 年,在每年的ISCA会议上宣布。 其名称用于纪念世界上第一台电子计算机ENIAC的两位设计者莫奇利(John W.Mauchly)和埃克特(J.Presper Eckert), 主要用来奖励在计算机和数字系统的硬件和软件,以及计算和数字系统分析方面作出杰出贡献的科学家。 Wilkes 奖(Maurice Wilkes Award):该奖每年在ISCA会议上宣布。 The award is given for an outstanding contribution to computer architecture made by an individual whose computer-related professional career (graduate school or full-time employment) began no earlier than 20 years prior to the time of nomination. 2018/11/18
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ENIAC-on-a-Chip ENIAC-on-a-Chip ENIAC
ENIAC 2 orders of magnitude bigger than machines built today More than 5 orders of magnitude slower, 1900 additions per second Limited primarily by a small amount of storage and tedious programming. Size: 7.44mm x 5.29mm; 174,569 transistors; 0.5 um CMOS technology (triple metal layer). 2018/11/18
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The Origin of the Stored Program
Von Neumann Computer 1944 – John von Neumann joined ENIAC team. Credited with the idea of storing programs as numbers 1945 – John von Neumann proposed a stored program computer called EDVAC John von Neumann wrote "First Draft of a Report on the EDVAC" in which he outlined the architecture of a stored-program computer. John von Neumann, c Credit: Computer History Museum 2018/11/18
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The Stored Program Computer Architecture (von Neumann Architecture)
运算器 (ALU) 存储器 控制器 输入设备 输出设备 数据流 控制流 CPU Electronic storage of programming information and data eliminated the need for the more clumsy methods of programming, such as punched paper tape — a concept that has characterized mainstream computer development since 1945. 2018/11/18
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The Stored Program Computer
1944: ENIAC Presper Eckert and John Mauchly -- first general electronic computer. Hard-wired program -- settings of dials and switches. 1944: Beginnings of EDVAC among other improvements, includes program stored in memory 1945: John von Neumann wrote a report on the stored program concept, known as the First Draft of a Report on EDVAC failed to credit designers, ironically still gets credit The basic structure proposed in the draft became known as the “von Neumann machine” (or model). a memory, containing instructions and data a processing unit, for performing arithmetic and logical operations a control unit, for interpreting instructions 2018/11/18
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Von Neumann Model 2018/11/18
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Memory k x m array of stored bits (k is usually 2n) Address Contents
unique (n-bit) identifier of location Contents m-bit value stored in location Basic Operations: LOAD read a value from a memory location STORE write a value to a memory location 0000 0001 0010 0011 0100 0101 0110 1101 1110 1111 • 2018/11/18
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Interface to Memory How does processing unit get data to/from memory?
MAR: Memory Address Register MDR: Memory Data Register To read a location (A): Write the address (A) into the MAR. Send a “read” signal to the memory. Read the data from MDR. To write a value (X) to a location (A): Write the data (X) to the MDR. Send a “write” signal to the memory. 2018/11/18
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Processing Unit Functional Units Registers Word Size
ALU = Arithmetic and Logic Unit could have many functional units. some of them special-purpose (multiply, square root, …) LC-3 performs ADD, AND, NOT Registers Small, temporary storage Operands and results of functional units LC-3 has eight register (R0, …, R7) Word Size number of bits normally processed by ALU in one instruction also width of registers LC-3 is 16 bits 2018/11/18
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Input and Output Devices for getting data into and out of computer memory Each device has its own interface, usually a set of registers like the memory’s MAR and MDR LC-3 supports keyboard (input) and console (output) keyboard: data register (KBDR) and status register (KBSR) console: data register (CRTDR) and status register (CRTSR) frame buffer: memory-mapped pixels Some devices provide both input and output disk, network Program that controls access to a device is usually called a driver. 2018/11/18 24
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Control Unit Orchestrates execution of the program
Instruction Register (IR) contains the current instruction. Program Counter (PC) contains the address of the next instruction to be executed. Control unit: reads an instruction from memory the instruction’s address is in the PC interprets the instruction, generating signals that tell the other components what to do an instruction may take many machine cycles to complete 2018/11/18
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Instruction Processing(state transtion)
EA OP EX S F D Fetch instruction from memory Decode instruction Evaluate address Fetch operands from memory Execute operation Store result 2018/11/18 26
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Instruction The instruction is the fundamental unit of work.
Specifies two things: opcode: operation to be performed operands: data/locations to be used for operation An instruction is encoded as a sequence of bits. (Just like data!) Often, but not always, instructions have a fixed length, such as 16 or 32 bits. Control unit interprets instruction: generates sequence of control signals to carry out operation. Operation is either executed completely, or not at all. A computer’s instructions and their formats is known as its Instruction Set Architecture (ISA). Persistent ISA invented by UW grad Gene Amdahl (IBM 360) 2018/11/18
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Example: LC-3 ADD Instruction
LC-3 has 16-bit instructions. Each instruction has a four-bit opcode, bits [15:12]. LC-3 has eight registers (R0-R7) for temporary storage. Sources and destination of ADD are registers. “Add the contents of R2 to the contents of R6, and store the result in R6.” 2018/11/18
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Example: LC-3 LDR Instruction
Load instruction -- reads data from memory Base + offset mode: add offset to base register -- result is memory address load from memory address into destination register “Add the value 6 to the contents of R3 to form a memory address. Load the contents stored in that address to R2.” 2018/11/18
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Instruction Processing: FETCH
Load next instruction (at address stored in PC) from memory into Instruction Register (IR). Load contents of PC into MAR. Send “read” signal to memory. Read contents of MDR, store in IR. Then increment PC, so that it points to the next instruction in sequence. PC becomes PC+1. EA OP EX S F D 2018/11/18
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Instruction Processing: DECODE
First identify the opcode. In LC-3, this is always the first four bits of instruction. A 4-to-16 decoder asserts a control line corresponding to the desired opcode. Depending on opcode, identify other operands from the remaining bits. Example: for LDR, last six bits is offset for ADD, last three bits is source operand #2 F D EA OP EX S 2018/11/18
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Instruction Processing: EVALUATE ADDRESS
For instructions that require memory access, compute address used for access. Examples: add offset to base register (as in LDR) add offset to PC (or to part of PC) add offset to zero F D EA OP EX S 2018/11/18
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Instruction Processing: FETCH OPERANDS
Obtain source operands needed to perform operation. Examples: load data from memory (LDR) read data from register file (ADD) F D EA OP EX S 2018/11/18
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Instruction Processing: EXECUTE
Perform the operation, using the source operands. Examples: send operands to ALU and assert ADD signal do nothing (e.g., for loads and stores) F D EA OP EX S 2018/11/18
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Instruction Processing: STORE
Write results to destination. (register or memory) Examples: result of ADD is placed in destination register result of memory load is placed in destination register for store instruction, data is stored to memory write address to MAR, data to MDR assert WRITE signal to memory F D EA OP EX S 2018/11/18
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Changing the Sequence of Instructions
In the FETCH phase, we incremented the Program Counter by 1. What if we don’t want to always execute the instruction that follows this one? examples: loop, if-then, function call Need special instructions that change the contents of the PC. These are called jumps and branches. jumps are unconditional -- they always change the PC branches are conditional -- they change the PC only if some condition is true (e.g., the contents of a register is zero) 2018/11/18
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Example: LC-3 JMP Instruction
Set the PC to the value contained in a register. This becomes the address of the next instruction to fetch. “Load the contents of R3 into the PC.” 2018/11/18 37
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Instruction Processing Summary
Instructions look just like data -- it’s all interpretation. Three basic kinds of instructions: computational instructions (ADD, AND, …) data movement instructions (LD, ST, …) control instructions (JMP, BRnz, …) Six basic phases of instruction processing: F D EA OP EX S not all phases are needed by every instruction phases may take variable number of machine cycles 2018/11/18
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Driving Force: The Clock
The clock is a signal that keeps the control unit moving. At each clock “tick,” control unit moves to the next machine cycle -- may be next instruction or next phase of current instruction. Clock generator circuit: Based on crystal oscillator Generates regular sequence of “0” and “1” logic levels Clock cycle (or machine cycle) -- rising edge to rising edge “1” “0” Machine Cycle time 2018/11/18
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Control Unit State Diagram
The control unit is a state machine. Here is part of a simplified state diagram for the LC-3: A more complete state diagram is in Appendix C. It will be more understandable after Chapter 5. 2018/11/18
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Stopping the Clock Control unit will repeat instruction processing sequence as long as clock is running. If not processing instructions from your application, then it is processing instructions from the Operating System (OS). The OS is a special program that manages processor and other resources. To stop the computer: AND the clock generator signal with ZERO when control unit stops seeing the CLOCK signal, it stops processing 2018/11/18
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Summary -- Von Neumann Model
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Summary -- LC-3 Data Path
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