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Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/
Semiconductor Device Modeling and Characterization EE5342, Lecture 8-Spring 2002 Professor Ronald L. Carter L08 07Feb02
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Effect of carrier recombination in DR
The S-R-H rate (tno = tpo = to) is L08 07Feb02
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Effect of carrier rec. in DR (cont.)
For low Va ~ 10 Vt In DR, n and p are still > ni The net recombination rate, U, is still finite so there is net carrier recomb. reduces the carriers available for the ideal diode current adds an additional current component L08 07Feb02
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Effect of carrier rec. in DR (cont.)
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High level injection effects
Law of the junction remains in the same form, [pnnn]xn=ni2exp(Va/Vt), etc. However, now dpn = dnn become >> nno = Nd, etc. Consequently, the l.o.t.j. reaches the limiting form dpndnn = ni2exp(Va/Vt) Giving, dpn(xn) = niexp(Va/(2Vt)), or dnp(-xp) = niexp(Va/(2Vt)), L08 07Feb02
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High level inj effects (cont.)
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Summary of Va > 0 current density eqns.
Ideal diode, Jsexpd(Va/(hVt)) ideality factor, h Recombination, Js,recexp(Va/(2hVt)) appears in parallel with ideal term High-level injection, (Js*JKF)1/2exp(Va/(2hVt)) SPICE model by modulating ideal Js term Va = Vext - J*A*Rs = Vext - Idiode*Rs L08 07Feb02
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Plot of typical Va > 0 current density eqns.
Vext-Vd=JARs ln J low level injection ln(JKF) Effect of Rs ln[(Js*JKF) 1/2] Effect of high level injection ln(Jsrec) data ln(Js) Vext recomb. current VKF L08 07Feb02
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Reverse bias (Va<0) => carrier gen in DR
Va < 0 gives the net rec rate, U = -ni/2t0, t0 = mean min carr g/r l.t. L08 07Feb02
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Reverse bias (Va< 0), carr gen in DR (cont.)
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Reverse bias junction breakdown
Avalanche breakdown Electric field accelerates electrons to sufficient energy to initiate multiplication of impact ionization of valence bonding electrons field dependence shown on next slide Heavily doped narrow junction will allow tunneling - see Neamen*, p. 274 Zener breakdown L08 07Feb02
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Ecrit for reverse breakdown (M&K**)
Taken from p. 198, M&K** L08 07Feb02
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Reverse bias junction breakdown
Assume -Va = VR >> Vbi, so Vbi-Va-->VR Since Emax~ 2VR/W = (2qN-VR/(e))1/2, and VR = BV when Emax = Ecrit (N- is doping of lightly doped side ~ Neff) BV = e (Ecrit )2/(2qN-) Remember, this is a 1-dim calculation L08 07Feb02
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Junction curvature effect on breakdown
The field due to a sphere, R, with charge, Q is Er = Q/(4per2) for (r > R) V(R) = Q/(4peR), (V at the surface) So, for constant potential, V, the field, Er(R) = V/R (E field at surface increases for smaller spheres) Note: corners of a jctn of depth xj are like 1/8 spheres of radius ~ xj L08 07Feb02
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BV for reverse breakdown (M&K**)
Taken from Figure 4.13, p. 198, M&K** Breakdown voltage of a one-sided, plan, silicon step junction showing the effect of junction curvature.4,5 L08 07Feb02
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Example calculations Assume throughout that p+n jctn with Na = 3e19cm-3 and Nd = 1e17cm-3 From graph of Pierret mobility model, mp = 331 cm2/V-sec and Dp = Vtmp = ? Why mp and Dp? Neff = ? Vbi = ? L08 07Feb02
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Parameters for examples
Get tmin from the model used in Project tmin = (45 msec) (7.7E-18cm3)Ni+(4.5E-36cm6)Ni2 For Nd = 1E17cm3, tp = 25 msec Why Nd and tp ? Lp = ? L08 07Feb02
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Hole lifetimes, taken from Shur***, p. 101.
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Example Js,long, = ? If xnc, = 2 micron, Js,short, = ? L08 07Feb02
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Example (cont.) Estimate VKF Estimate IKF L08 07Feb02
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Example (cont.) Estimate Js,rec Estimate Rs if xnc is 100 micron
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Example (cont.) Estimate Jgen for 10 V reverse bias Estimate BV
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Diode equivalent circuit (small sig)
ID h is the practical “ideality factor” IQ VD VQ L08 07Feb02
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Small-signal eq circuit
Cdiff and Cdepl are both charged by Va = VQ Va Cdiff rdiff Cdepl L08 07Feb02
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Diode Switching Consider the charging and discharging of a Pn diode
(Na > Nd) Wd << Lp For t < 0, apply the Thevenin pair VF and RF, so that in steady state IF = (VF - Va)/RF, VF >> Va , so current source For t > 0, apply VR and RR IR = (VR + Va)/RR, VR >> Va, so current source L08 07Feb02
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Diode switching (cont.)
VF,VR >> Va F: t < 0 Sw RF R: t > 0 VF + RR D + VR L08 07Feb02
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Diode charge for t < 0 pn pno x xn xnc L08 07Feb02
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Diode charge for t >>> 0 (long times)
pn pno xn xnc x L08 07Feb02
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Equation summary L08 07Feb02
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Snapshot for t barely > 0
pn Total charge removed, Qdis=IRt pno x xn xnc L08 07Feb02
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I(t) for diode switching
ID IF ts ts+trr t - 0.1 IR -IR L08 07Feb02
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References * Semiconductor Physics and Devices, 2nd ed., by Neamen, Irwin, Boston, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Muller and Kamins, John Wiley, New York, 1986. ***Physics of Semiconductor Devices, Shur, Prentice-Hall, 1990. L08 07Feb02
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