1. CSCE 350 Computer Architecture
Arithmetic Unit Design
ALU Design – Integer Addition, Multiplication & Division
Adapted from David H. Albonesi
Copyright David H. Albonesi and the University of Rochester.

2. Integer multiplication
Pencil and paper binary multiplication
(multiplicand) x
(multiplier)

3. Integer multiplication
Pencil and paper binary multiplication
(multiplicand) x
(multiplier)
1000

4. Integer multiplication
Pencil and paper binary multiplication
(multiplicand) x
(multiplier)
1000
00000

5. Integer multiplication
Pencil and paper binary multiplication
(multiplicand) x
(multiplier)
1000
00000
000000

6. Integer multiplication
Pencil and paper binary multiplication
(multiplicand) x
(multiplier)
1000
00000
000000

7. Integer multiplication
Pencil and paper binary multiplication
(multiplicand) x
(multiplier)
1000
00000
(partial products)
000000
(product)

8. Integer multiplication
Pencil and paper binary multiplication
Key elements
Examine multiplier bits from right to left
Shift multiplicand left one position each step
Simplification: each step, add multiplicand to running product total, but only if multiplier bit = 1
(multiplicand) x
(multiplier)
1000
00000
(partial products)
000000
(product)

9. Integer multiplication
Initialize product register to 0
(multiplicand)
(multiplier)
(running product)

10. Integer multiplication
Multiplier bit = 1: add multiplicand to product
1000
(multiplicand)
(multiplier)
+1000
(new running product)

11. Integer multiplication
Shift multiplicand left
10000
(multiplicand)
(multiplier)
+1000

12. Integer multiplication
Multiplier bit = 0: do nothing
10000
(multiplicand)
(multiplier)
+1000

13. Integer multiplication
Shift multiplicand left
100000
(multiplicand)
(multiplier)
+1000

14. Integer multiplication
Multiplier bit = 0: do nothing
100000
(multiplicand)
(multiplier)
+1000

15. Integer multiplication
Shift multiplicand left
(multiplicand)
(multiplier)
+1000

16. Integer multiplication
Multiplier bit = 1: add multiplicand to product
(multiplicand)
(multiplier)
+1000
(product)

17. Integer multiplication
32-bit hardware implementation
Multiplicand loaded into right half of multiplicand register
Product register initialized to all 0’s
Repeat the following 32 times
If multiplier register LSB=1, add multiplicand to product
Shift multiplicand one bit left
Shift multiplier one bit right
LSB

18. Integer multiplication
Algorithm

19. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand

20. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
(running product)

21. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
+1000
(new running product)

22. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
+1000
(new running product)

23. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
+1000
(new running product)

24. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
+1000
(new running product)

25. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
+1000
(new running product)

26. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
+1000
(new running product)

27. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
+1000
(new running product)

28. Integer multiplication
Drawback: half of 64-bit multiplicand register are zeros
Half of 64 bit adder is adding zeros
Solution: shift product right instead of multiplicand left
Only left half of product register added to multiplicand
(multiplicand)
(multiplier)
+1000
+1000
(product)

29. Integer multiplication
Hardware implementation

30. Integer multiplication
Final improvement: use right half of product register for the multiplier

31. Integer multiplication
Final algorithm

32. Multiplication of signed numbers
Naïve approach
Convert to positive numbers
Multiply
Negate product if multiplier and multiplicand signs differ
Slow and extra hardware

33. Multiplication of signed numbers
Booth’s algorithm
Invented for speed
Shifting was faster than addition at the time
Objective: reduce the number of additions required
Fortunately, it works for signed numbers as well
Basic idea: the additions from a string of 1’s in the multiplier can be converted to a single addition and a single subtraction operation
Example: is equivalent to –
requires an addition for this bit position
requires additions for each of these bit positions
and a subtraction for this bit position

34. Booth’s algorithm
Starting from right to left, look at two adjacent bits of the multiplier
Place a zero at the right of the LSB to start
If bits = 00, do nothing
If bits = 10, subtract the multiplicand from the product
Beginning of a string of 1’s
If bits = 11, do nothing
Middle of a string of 1’s
If bits = 01, add the multiplicand to the product
End of a string of 1’s
Shift product register right one bit

35. Booth recoding
Example
(multiplicand) x
(multiplier)

36. Booth recoding Example 0010 (multiplicand)
(product+multiplier)
extra bit position

37. Booth recoding
Example
(multiplicand)
+1110

38. Booth recoding
Example
(multiplicand)
+1110

39. Booth recoding Example 0010 (multiplicand) 00001101 0 +1110 11110110 1
+0010

40. Booth recoding Example 0010 (multiplicand) 00001101 0 +1110 11110110 1
+0010

41. Booth recoding Example 0010 (multiplicand) 00001101 0 +1110 11110110 1
+0010
+1110

42. Booth recoding Example 0010 (multiplicand) 00001101 0 +1110 11110110 1
+0010
+1110

43. Booth recoding Example 0010 (multiplicand) 00001101 0 +1110 11110110 1
+0010
+1110

44. Booth recoding Example 0010 (multiplicand) 00001101 0 +1110 11110110 1
+0010
+1110
(product)

45. Integer division Pencil and paper binary division (divisor) 1000
(dividend)

46. Integer division Pencil and paper binary division 1 (divisor) 1000
(dividend)
- 1000
(partial remainder)

47. Integer division Pencil and paper binary division 1 (divisor) 1000
(dividend)
- 1000
00010

48. Integer division Pencil and paper binary division 10 (divisor) 1000
(dividend)
- 1000
00010

49. Integer division Pencil and paper binary division 10 (divisor) 1000
(dividend)
- 1000
000100

50. Integer division Pencil and paper binary division 100 (divisor) 1000
(dividend)
- 1000
000100

51. Integer division Pencil and paper binary division 100 (divisor) 1000
(dividend)
- 1000

52. Integer division Pencil and paper binary division 1001 (quotient)
(divisor) 1000
(dividend)
- 1000
(remainder)

53. Integer division Pencil and paper binary division Steps in hardware
Shift the dividend left one position
Subtract the divisor from the left half of the dividend
If result positive, shift left a 1 into the quotient
Else, shift left a 0 into the quotient, and repeat from the beginning
Once the result is positive, repeat the process for the partial remainder
Do n iterations where n is the size of the divisor
(quotient)
(divisor) 1000
(dividend)
- 1000
(remainder)

54. Integer division Initial state (divisor) 1000 01001000 (dividend)
(quotient)

55. Integer division Shift dividend left one position (divisor) 1000
(quotient)

56. Integer division Subtract divisor from left half of dividend
(quotient)
- 1000
(keep these bits)

57. Integer division Result positive, left shift a 1 into the quotient
(divisor) 1000
(dividend)
(quotient)
- 1000

58. Integer division Shift partial remainder left one position
(divisor) 1000
(dividend)
(quotient)
- 1000

59. Integer division Subtract divisor from left half of partial remainder
(dividend)
(quotient)
- 1000
- 1000

60. Integer division Result negative, left shift 0 into quotient
(divisor) 1000
(dividend)
(quotient)
- 1000
- 1000

61. Integer division Restore original partial remainder (how?)
(divisor) 1000
(dividend)
(quotient)
- 1000
- 1000

62. Integer division Shift partial remainder left one position
(divisor) 1000
(dividend)
(quotient)
- 1000
- 1000

63. Integer division Subtract divisor from left half of partial remainder
(dividend)
(quotient)
- 1000
- 1000
- 1000

64. Integer division Result negative, left shift 0 into quotient
(divisor) 1000
(dividend)
(quotient)
- 1000
- 1000
- 1000

65. Integer division Restore original partial remainder (divisor) 1000
(dividend)
(quotient)
- 1000
- 1000
- 1000

66. Integer division Shift partial remainder left one position
(divisor) 1000
(dividend)
(quotient)
- 1000
- 1000
- 1000

67. Integer division Subtract divisor from left half of partial remainder
(dividend)
(quotient)
- 1000
- 1000
- 1000
- 1000

68. Integer division Result positive, left shift 1 into quotient
(divisor) 1000
(dividend)
(quotient)
- 1000
- 1000
- 1000
- 1000
(remainder)

69. What operations do we do here? Load dividend here initially
Integer division
Hardware implementation
What operations do we do here?
Load dividend here initially

70. Integer and floating point revisited
ALU
data
memory
integer
register
file P C
instruction
memory
integer
multiplier HI LO
flt pt
adder
flt pt
register
file
flt pt
multiplier
Integer ALU handles add, subtract, logical, set less than, equality test, and effective address calculations
Integer multiplier handles multiply and divide
HI and LO registers hold result of integer multiply and divide

71. Floating point representation
Floating point (fp) numbers represent reals
Example reals: , 1.23 x 10-19, x 106
Floats and doubles in C
Fp numbers are in signed magnitude representation of the form (-1)S x M x BE where
S is the sign bit (0=positive, 1=negative)
M is the mantissa (also called the significand)
B is the base (implied)
E is the exponent
Example: x 10-4
S=0
M=22.34
B=10
E=-4

72. Floating point representation
Fp numbers are normalized in that M has only one digit to the left of the “decimal point”
Between 1.0 and … in decimal
Between 1.0 and … in binary
Simplifies fp arithmetic and comparisons
Normalized: x 102, 1.23 x 10-19
Not normalized: x 106 , x 10-4 , x 10-45
In binary format, normalized numbers are of the form
Leading 1 in 1.M is implied
(-1)S x 1.M x BE

73. Floating point representation tradeoffs
Representing a wide enough range of fp values with enough precision (“decimal” places) given limited bits
More E bits increases the range
More M bits increases the precision
A larger B increases the range but decreases the precision
The distance between consecutive fp numbers is not constant!
(-1)S x 1.M x BE
32 bits S
E??
M?? … … BE
BE+1
BE+2

74. Floating point representation tradeoffs
Allowing for fast arithmetic implementations
Different exponents requires lining up the significands; larger base increases the probability of equal exponents
Handling very small and very large numbers
representable negative numbers (S=1)
representable positive numbers (S=0)
exponent overflow
exponent underflow
exponent overflow

75. Sorting/comparing fp numbers
fp numbers can be treated as integers for sorting and comparing purposes if E is placed to the left
Example
3.67 x > x > x 10-4
(-1)S x 1.M x BE S E M
If E’s are same, bigger M is bigger number
bigger E is bigger number

76. Biased exponent notation
111…111 represents the most positive E and 000…000 represents the most negative E for sorting/comparing purposes
To get correct signed value for E, need to subtract a bias of 011…111
Biased fp numbers are of the form (-1)S x 1.M x BE-bias
Example: assume 8 bits for E
Bias is = 127
Largest E represented by which is 255 – 127 = 128
Smallest E represented by which is 0 – 127 = -127

77. IEEE 754 floating point standard
Created in 1985 in response to the wide range of fp formats used by different companies
Has greatly improved portability of scientific applications
B=2
Single precision (sp) format (“float” in C)
Double precision (dp) format (“double” in C) S E M
1 bit
8 bits
23 bits S E M
1 bit
11 bits
52 bits

78. IEEE 754 floating point standard
Exponent bias is 127 for sp and 1023 for dp
Fp numbers are of the form (-1)S x 1.M x 2E-bias
1 in mantissa and base of 2 are implied
Sp form is (-1)S x 1.M22 M21 …M0 x 2E and value is (-1)S x (1+(M22x2-1) +(M21x2-2)+…+(M0x2-23)) x 2E-127
Sp example
Number is –1.1000…000 x =-1.1 x 2-126=1.763 x 10-38 1
1000…000 S E M

79. IEEE 754 floating point standard
Denormalized numbers
Allow for representation of very small numbers
Identified by E=0 and a non-zero M
Format is (-1)S x 0.M x 2-(bias-1)
Smallest positive dp denormalized number is 0.00…01 x = smallest positive dp normalized number is 1.0 x
Hardware support is complex, and so often handled by software
representable negative numbers
representable positive numbers
exponent overflow
exponent underflow
exponent overflow

80. Floating point addition
Make both exponents the same
Find the number with the smaller one
Shift its mantissa to the right until the exponents match
Must include the implicit 1 (1.M)
Add the mantissas
Choose the largest exponent
Put the result in normalized form
Shift mantissa left or right until in form 1.M
Adjust exponent accordingly
Handle overflow or underflow if necessary
Round
Renormalize if necessary if rounding produced an unnormalized result

81. Floating point addition
Algorithm

82. Floating point addition example
Initial values 1
0000…01100 S E M
0100…00111 S E M

83. Floating point addition example
Identify smaller E and calculate E difference 1
0000…01100 S E M
difference = 2
0100…00111 S E M

84. Floating point addition example
Shift smaller M right by E difference 1
0100…00011 S E M
0100…00111 S E M

85. Floating point addition example
Add mantissas 1
0100…00011 S E M
0100…00111 S E M
… …00111 = …00100
0000…00100 S E M

86. Floating point addition example
Choose larger exponent for result 1
0100…00011 S E M
0100…00111 S E M
0000…00100 S E M

87. Floating point addition example
Final answer (already normalized) 1
0100…00011 S E M
0100…00111 S E M
0000…00100 S E M

88. Floating point addition
Hardware design
determine smaller exponent

89. Floating point addition
Hardware design
shift mantissa of smaller number right by exponent difference

90. Floating point addition
Hardware design
add mantissas

91. Floating point addition
Hardware design
normalize result by shifting mantissa of result and adjusting larger exponent

92. Floating point addition
Hardware design
round result

93. Floating point addition
Hardware design
renormalize if necessary

94. Floating point multiply
Add the exponents and subtract the bias from the sum
Example: (5+127) + (2+127) – 127 = 7+127
Multiply the mantissas
Put the result in normalized form
Shift mantissa left or right until in form 1.M
Adjust exponent accordingly
Handle overflow or underflow if necessary
Round
Renormalize if necessary if rounding produced an unnormalized result
Set S=0 if signs of both operands the same, S=1 otherwise

95. Floating point multiply
Algorithm

96. Floating point multiply example
Initial values 1
1000…00000
-1.5 x S E M
1000…00000
1.5 x S E M

97. Floating point multiply example
Add exponents 1
1000…00000
-1.5 x S E M
1000…00000
1.5 x S E M
= (231)

98. Floating point multiply example
Subtract bias 1
1000…00000
-1.5 x S E M
1000…00000
1.5 x S E M
– = = (104) S E M

99. Floating point multiply example
Multiply the mantissas 1
1000…00000
-1.5 x S E M
1000…00000
1.5 x S E M
1.1000… x … = … S E M

100. Floating point multiply example
Normalize by shifting 1.M right one position and adding one to E 1
1000…00000
-1.5 x S E M
1000…00000
1.5 x S E M
… => …
001000… S E M

101. Floating point multiply example
Set S=1 since signs are different 1
1000…00000
-1.5 x S E M
1000…00000
1.5 x S E M x 1
001000… S E M

102. Rounding
Fp arithmetic operations may produce a result with more digits than can be represented in 1.M
The result must be rounded to fit into the available number of M positions
Tradeoff of hardware cost (keeping extra bits) and speed versus accumulated rounding error

103. Rounding Examples from decimal multiplication
Renormalization is required after rounding in c)

104. Rounding Examples from binary multiplication (assuming two bits for M)
1.01 x 1.01 = (1.25 x 1.25 = )
1.11 x 1.01 = (1.75 x 1.25 = )
Result has twice as many bits
1.10 x 1.01 = (1.5 x 1.25 = 1.875)
May require renormalization after rounding

105. Rounding
In binary, an extra bit of 1 is halfway in between the two possible representations
1.001 (1.125) is halfway between 1.00 (1) and 1.01 (1.25)
1.101 (1.625) is halfway between 1.10 (1.5) and 1.11 (1.75)

106. IEEE 754 rounding modes Truncate Round up to the next value
Remove all digits beyond those supported
> 1.00
Round up to the next value
> 1.01
Round down to the previous value
Differs from Truncate for negative numbers
Round-to-nearest-even
Rounds to the even value (the one with an LSB of 0)
> 1.10
Produces zero average bias
Default mode

107. Implementing rounding
A product may have twice as many digits as the multiplier and multiplicand
1.11 x 1.01 =
For round-to-nearest-even, we need to know
The value to the right of the LSB (round bit)
Whether any other digits to the right of the round digit are 1’s
The sticky bit is the OR of these digits
LSB of final rounded result
rounds to 1.01
Sticky bit = 0 OR 1 = 1
Round bit
rounds to 1.00

108. Implementing rounding
The product before normalization may have 2 digits to the left of the binary point
Product register format needs to be
Two possible cases
bb.bbbb…
1b.bbbb…
r sssss…
01.bbbb…
r sssss…
Need this as a result bit!

109. Implementing rounding
The guard bit (g) becomes part of the unrounded result when the MSB = 0
g, r, and s suffice for rounding addition as well

110. MIPS floating point registers
control/status register 31 31 f0
FCR31 f1 .
implementation/revision register 31
FCR0
f30
f31
32 32-bit FPRs
16 64-bit registers (32-bit register pairs) for dp floating point
Software conventions for their usage (as with GPRs)
Control/status register
Status of compare operations, sets rounding mode, exceptions
Implementation/revision register
Identifies type of CPU and its revision number

111. MIPS floating point instruction overview
Operate on single and double precision operands
Computation
Add, sub, multiply, divide, sqrt, absolute value, negate
Multiply-add, multiply-subtract
Added as part of MIPS-IV revision of ISA specification
Load and store
Integer register read for EA calculation
Data to be loaded or stored in fp register file
Move between registers
Convert between different formats
Comparison instructions
Branch instructions

112. MIPS R10000 arithmetic units
data
memory
EA calc
integer
ALU
integer
register
file P C
instruction
memory
integer
ALU +
multiplier
flt pt
adder
flt pt
register
file
flt pt
multiplier
flt pt
divider
flt pt
sq root

113. MIPS R10000 arithmetic units
Integer ALU + shifter
All instructions take one cycle
Integer ALU + multiplier
Booth’s algorithm for multiplication (5-10 cycles)
Non-restoring division (34-67 cycles)
Floating point adder
Carry propagate (2 cycles)
Floating point multiplier (3 cycles)
Booth’s algorithm
Floating point divider (12-19 cycles)
Floating point square root unit
Separate unit for EA calculations
Can start up to 5 instructions in 1 cycle

114. Questions?