1. A New Test Vector Search Algorithm for a Single Stuck-at Fault using Probabilistic Correlation
Muralidharan Venkatasubramanian
Ph. D Proposal Exam
Chair
Dr. Vishwani D. Agrawal
Committee
Dr. Adit D. Singh Dr. Victor P. Nelson Dr. Michael C. Hamilton
Department of Electrical and Computer Engineering
Auburn University

2. Outline Purpose Motivation Background Methodology Results
Conclusion and Future work
References
11/20/2018
Ph.D Proposal Exam

3. Purpose Given a stuck-at fault, find a test.
Specifically, find tests for hard-to-detect stuck-at faults.
Derive a probabilistic computing algorithm to search for test vectors.
Increased interests in areas of probabilistic algorithms due to the probabilistic nature of quantum computers.
11/20/2018
Ph.D Proposal Exam

4. Motivation
Fault detection problem is NP complete [Ibarra and Sahni, 1975; Fujiwara and Toida, 1982; Seroussi and Bshouty, 1988].
Various algorithms have been designed.
D Algorithm [Roth, 1966]
PODEM [Goel, 1981]
FAN [Fujiwara and Shimono, 1983]
Many others…
Nature of NP complete problem implies that increasing the circuit size will exponentially increase the worst case computation time of test generation.
11/20/2018
Ph.D Proposal Exam

5. Background

6. Overview of Previous Research
Generation of test vectors a classic VLSI problem.
First testing algorithm was probably a pure random test generator.
Small circuits which could be easily targeted by exhaustive testing.
Testing became horribly inefficient for larger circuits.
Development of test vectors from structural description of circuits.
D Algorithm, FAN, PODEM etc.
Vastly improved search time over random TPG.
Need for deriving test sets from functional description of circuits rather circuit structure [Akers, 1972 ; Reddy, 1973].
Multiple implementations of same logic
Manufacturers’ need for protecting circuit design.
11/20/2018
Ph.D Proposal Exam

7. Overview (contd..) Use of weighted random test generators
Heuristics like input switching activity and weight assignment [Schnurmann et al., 1972].
Skewing input probability to attain maximum output entropy [Agrawal, 1981].
Selection of new tests depending explicitly on previously generated successful tests.
Antirandom testing [Malaiya, 1995].
Use of Hamming distance and/or Cartesian distance between test vectors.
Using spectral properties of successful vectors to generate new vectors [Yogi and Agrawal, 2006].
Implementing Hadamard matrices for Walsh functions.
Search limits when searching for unique test vectors of hard to detect faults.
Problem devolves back to NP hard problem.
Proposed solution uses probabilistic correlation among primary inputs.
Skew the search in the test vector space.
11/20/2018
Ph.D Proposal Exam

8. Methodology

9. Algorithm Genesis How does one prosper in life??
Repeating steps from previous successes.
As people say, do not change a successful formula.
Learning from past failures and avoiding them.
All known algorithms use previous successes to generate new test vectors.
But, test generation has lots more failed attempts than successful ones.
Current algorithms ignoring a lot of potentially valuable information.
How to design a new test algorithm which utilizes the information from failed attempts effectively?
11/20/2018
Ph.D Proposal Exam

10. Algorithm Principle
Current algorithms hit a bottleneck when testing hard-to-detect faults.
Because we are testing hard-to-detect faults, we generally have many trial vectors that do not work.
Conjecture is to find test vectors with properties not similar to the previously found vectors.
Ignore vectors with properties similar to known unsuccessful test vectors.
What property??
Conditional probabilities among primary inputs derived from known unsuccessful test vectors.
11/20/2018
Ph.D Proposal Exam

11. Principle (contd..)
Quantify probabilities in an n x n probability matrix.
n is the no. of primary inputs.
Diagonal represents independent probability of ‘0’ or ‘1’ at primary input.
An off-diagonal entry represents conditional probability of ‘0’ or ‘1’ at other inputs given a state at the chosen primary input.
Probability matrix contains information from unsuccessful test vectors.
11/20/2018
Ph.D Proposal Exam

12. Algorithm Steps
Initially, the values in the probability matrix contain '0.5' at the diagonals and '0' at the off-diagonals.
Generate a random vector and apply to the primary inputs of the circuit.
If the vector is a test, save the vector for the corresponding stuck-at fault, identify a new stuck-at fault, and go to step 1.
If the vector is not a test and no. of random test samples < 3, go to step 2. Else, go to step 5.
Update the diagonal values with the independent probability of an input being a ‘1’.
Update the off-diagonal values with the conditional probabilities of the input bits being a ‘1’ given a bit at a particular input is a ‘1’ or a ‘0’.
Next, traverse the diagonal and highlight the element with the smallest independent probability in the n x n matrix.
11/20/2018
Ph.D Proposal Exam

13. Algorithm Steps (contd..)
If the element has been highlighted before, choose the next smallest element till the entire diagonal has been traversed.
Extract the entire column of the matrix containing the smallest diagonal element once it has been accurately identified.
Force the value of the diagonal element to a ‘0’ or a ‘1’ based on the opposite correlation of the probability value. Then, in ascending order, traverse the column and force the bit values to a ‘0’ or a ‘1’ depending upon the opposite correlation probability.
Apply the vector generated by step 7 to the primary inputs of the circuit, and validate if the vector triggers the stuck-at fault.
If the extracted vector is not a test, go to step 4.
If the vector is a test, identify a new stuck-at fault and restart the algorithm from step 1.
11/20/2018
Ph.D Proposal Exam

14. Algorithm Example c17 benchmark circuit
5 primary inputs
Initially, apply random vectors to the CUT so as to build an initial table of unsuccessful vectors.
X Stuck-at-1
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Ph.D Proposal Exam

15. Conditional Probability Matrix
Steps 1-6 (contd..)
Initial failed test vectors derived from random TPG
Conditional Probability Matrix A
0.66
0.50 1 B
0.33 C D E
Input signal probability
Input signal probability conditional to corresponding input being ‘1’
11/20/2018
Ph.D Proposal Exam

16. Conditional Probability Matrix
Step 7 (contd..)
Initial failed test vectors derived from random TPG
Conditional Probability Matrix A
0.66
0.50 1 B
0.33 C D E
Extract the entire column after identifying the smallest diagonal element.
11/20/2018
Ph.D Proposal Exam

17. Steps 9-10 (contd..) A B 0.33 C 1 D E A 1 B 0.67 C D EB
0.33 C 1 D E A 1 B
0.67 C D E
Extracted column after identifying the smallest diagonal element.
Opposite probability (1 – X) where X is the probability value
Test vector extracted:
11/20/2018
Ph.D Proposal Exam

18. Test Vector Analysis 1 1 1 1 1 1 1 1/1 1/1 1 11 1 1 1 1
X Stuck-at-1 1
1/1
1/1 1 1
Not a test, so go to step 4!!
11/20/2018
Ph.D Proposal Exam

19. Conditional Probability Matrix
Steps 4-8 (contd..)
Failed Test Vectors
Conditional Probability Matrix A
0.75
0.50
0.66 1 B
0.33 C D E
Extract this column as diagonal element no. 2 was already selected before.
11/20/2018
Ph.D Proposal Exam

20. Steps 9-10 (contd..) A 0.50 B C 1 D E A 0.50 B C D ED E
Extracted column after identifying the smallest diagonal element.
Opposite probability (1 – X) where X is the probability value
Test vector extracted:
11/20/2018
Ph.D Proposal Exam

21. Test Vector Analysis 1 1 1 1 1 1/1 0/0 1 11 1 1 1
X Stuck-at-1 1
1/1
0/0 1 1
Not a test, so go to step 4!!
11/20/2018
Ph.D Proposal Exam

22. Conditional Probability Matrix
Steps 4-8 (contd..)
Failed Test Vectors
Conditional Probability Matrix A
0.60
0.33
0.66
0.75 B
0.50 C D E 1
0.80
Extract this column as diagonal element no. 2 and 4 were already selected before.
11/20/2018
Ph.D Proposal Exam

23. Steps 9-10 (contd..) A 0.60 B 0.33 C 0.66 D E 1 A 0.40 B 0.66 C 0.33 D
Extracted column after identifying the smallest diagonal element.
Opposite probability (1 – X) where X is the probability value
Test vector extracted:
11/20/2018
Ph.D Proposal Exam

24. Test Vector Analysis 1 1 1 1 1 1 0/1 1/0 1 11 1 1 1 1
X Stuck-at-1 1
0/1
1/0 1 1
Not a test, so go to step 4!!
11/20/2018
Ph.D Proposal Exam

25. Probability Correlation Matrix
Steps 4-8 (contd..)
Failed Test Vectors
Probability Correlation Matrix A
0.50
0.25
0.66
0.75 B
0.33 C D E 1
Extract this column as diagonal element no. 1, 2 and 4 were already selected before.
11/20/2018
Ph.D Proposal Exam

26. Steps 9-10 (contd..) A 0.66 B 0.33 C 0.50 D E A 0.33 B 0.66 C 0.50 D E
Extracted column after identifying the smallest diagonal element.
Opposite probability (1 – X) where X is the probability value
Test vector extracted:
11/20/2018
Ph.D Proposal Exam

27. Test Vector Analysis 1 1 1 1 1 1 0/1 1/0 1 1 Is a test!!! 1 1 1 1 1
X Stuck-at-1 1
0/1
1/0 1 1
Is a test!!! 
11/20/2018
Ph.D Proposal Exam

28. Open Questions Why the need for three initial random vectors?
Can the process be started with one vector?
Significance of minimum diagonal element?
Why is conditional probability w.r.t. ‘1’ taken?
How to avoid the problem of localization?
11/20/2018
Ph.D Proposal Exam

29. Results

30. Validation of algorithm
Algorithm applied to a 10 input AND gate.
Results compared with Random TPG.
Further comparison with Weighted Random TPG [Agrawal, 1981].
Algorithm applied to two ISCAS benchmark circuits and compared with Random TPG.
C17 benchmark circuit.
C492 benchmark circuit.
11/20/2018
Ph.D Proposal Exam

31. 10 input AND gate (Random TPG)
Mean = 566
Average no. of iterations needed to find a single stuck-at fault using a random test generator
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Ph.D Proposal Exam

32. 10 input AND gate (Weighted Random)
Mean = 26
Average no. of iterations needed to find a single stuck-at fault using a weighted random test generator [Agrawal, 1981]
11/20/2018
Ph.D Proposal Exam

33. 10 input AND gate (Proposed Algorithm)
Mean = 9
Average no. of iterations needed to find a single stuck-at fault using the proposed correlation algorithm
11/20/2018
Ph.D Proposal Exam

34. Benchmark circuits (c17)
Has 5 primary inputs.
Had no hard to detect stuck-at faults.
6 test vectors can detect all possible stuck-at faults.
Tried to find faults which had the least number of tests.
Random TPG needed 64 iterations with worst case of 128 iterations.
Testable Fault no.
Proposed Algorithm iterations
Random TPG iterations
Average iterations needed 1 7 11
25/2 = 24 = 16 2 9 15
11/20/2018
Ph.D Proposal Exam

35. Benchmark circuits (c432)
Has 27 primary inputs
Chose 4 hard-to-detect stuck-at faults.
Used FastScan’s random generator to try and find tests for these faults.
Purely random mode was unable to find the tests.
Need to properly analyze how FastScan’s random test generator works.
Testable Fault no.
Correlation Algorithm iterations
Random TPG iterations
Average iterations needed 1
3180
Ran out of available disk space
227/2 = 226 2
1864 3
3179 4
1865
11/20/2018
Ph.D Proposal Exam

36. Conclusion Overview of evolution of testing algorithms.
Highlighted how all known algorithms use previous successful vectors to derive new test vectors.
Demonstrated proof of concept of new probabilistic correlation algorithm.
Derive new vectors from unsuccessful test vectors from a conditional probability matrix.
Shown resilience compared to previously published output entropy based algorithm.
Initial results show the superiority of algorithm over random and pseudo-random Test Pattern Generators.
11/20/2018
Ph.D Proposal Exam

37. Future Work and Open Questions
Running simulations on all ISCAS benchmark circuits.
Optimizing the algorithm for more efficiency.
Comparing efficiency with other contemporary algorithms to prove superiority.
Weighted random generators [[Schnurmann et al., 1972; Agrawal, 1981]
Spectral test generators [Yogi and Agrawal, 2006]
Anti-random test generators [Malaiya, 1995]
Foray into quantum algorithms (future vision).
Can probabilistic nature of the algorithm deem an evolution into a quantum computing algorithm?
11/20/2018
Ph.D Proposal Exam

38. Success consists of going from failure to failure without loss of enthusiasm.
- Sir Winston Churchill
11/20/2018
Ph.D Proposal Exam

39. References
[1] O. H. Ibarra and S. Sahni, “Polynomially complete fault detection problems,” IEEE Trans. Computers, vol. 24, no. 3, pp. 242–249, [2] H. Fujiwara and S. Toida, “The complexity of fault detection problems for combinational logic circuits,”IEEE Transactions on Computers, vol. 100, no. 6, pp. 555–560, [3] G. Seroussi and N. H. Bshouty, “Vector sets for exhaustive testing of logic circuits,” IEEE Transactions on Information Theory, vol. 34, no. 3, pp. 513–522, [4] J. P. Roth, “Diagnosis of automata failures: A calculus and a method,” IBM Journal of Research and Development, vol. 10, no. 4, pp. 278–291, [5] P. Goel, “An implicit enumeration algorithm to generate tests for combinational logic circuits,” IEEE Transactions on Computers, vol. 100, no. 3, pp. 215–222, [6] H. Fujiwara and T. Shimono, “On the acceleration of test generation algorithms,” IEEE Transactions on Computers, vol. 100, no. 12, pp. 1137–1144, 1983.
11/20/2018
Ph.D Proposal Exam

40. References (contd..)
[7] S. B. Akers, “Universal test sets for logic networks,” in IEEE Conference Record of 13th IEEE Annual Symposium on Switching and Automata Theory, 1972, pp. 177–184. [8] S. M. Reddy, “Complete test sets for logic functions,” IEEE Transactions on Computers, vol. 100, no. 11, pp. 1016–1020, [9] H. D. Schnurmann, E. Lindbloom, and R. G. Carpenter, “The weighted random test-pattern generator,” IEEE Transactions on Computers, vol. 100, no. 7, pp. 695–700, [10] V. D. Agrawal, “An information theoretic approach to digital fault testing,” IEEE Transactions on Computers, vol. 30, no. 8, pp. 582–587, [11] N. Yogi and V. D. Agrawal, “Spectral RTL test generation for gate-level stuck-at faults,” in Proc. 15th Asian Test Symposium, IEEE, 2006, pp. 83–88. [12] Y. K. Malaiya, “Antirandom testing: Getting the most out of black-box testing,” in Proc. Sixth IEEE International Symposium on Software Reliability Engineering, 1995, pp. 86–95.
11/20/2018
Ph.D Proposal Exam

41. Questions??
Thank You!!!