1. ECE 616 Advanced FPGA Designs
Electrical and Computer Engineering University of Western Ontario

2. General 1. Welcome remark Digital and analog VLSI: ASIC and FPGA
Overview
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3. Course Requirement Rules Attendance Projects: Final 22/11/2018
Note: Majority gate/ pass gate
FPGA for multiplier, divider,floating point, RSA,
Design and analysis and download
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4. Information Text book in library: Class notes and lab manual:
M. J. S. Smith, Application-Specific Integrated Circuits, Addison-Wesley, ISBN:
Digital Systems Design Using VHDL, Charles H. Roth, Jr., PWS Publishing, 1998 (ISBN: X).
Class notes and lab manual:
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5. Wei Wang Office: EC 1006 Office hours: Thursday 3:00 to 5:00 pm
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6. Digital and Analog
Digital TV
Amplifier
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7. History
DSP, telecommunication, computer, microprocessor
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8. 1947 transisitor
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9. Overview Digital system: 489 materials VHDL FPGA and CPLD 22/11/2018
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10. Review of Logic Design Fundamentals
Outline
Review of Logic Design Fundamentals
Combinational Logic
Boolean Algebra and Algebraic Simplifications
Karnaugh Maps
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11. Combinational Logic
Has no memory => present state depends only on the present input
X = x1 x2... xn
Z = z1 z2... zm x1 z1 x2 z2 xn zm
Note: Positive Logic – low voltage corresponds to a logic 0, high voltage to a logic 1 Negative Logic – low voltage corresponds to a logic 1, high voltage to a logic 0
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12. Basic Logic Gates
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13. Full Adder Module Truth table
Algebraic expressions F(inputs for which the function is 1):
Minterms
m-notation
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14. Full Adder (cont’d) Module Truth table
Algebraic expressions F(inputs for which the function is 0):
Maxterms
M-notation
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15. Boolean Algebra Basic mathematics used for logic design
Laws and theorems can be used to simplify logic functions
Why do we want to simplify logic functions?
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16. Laws and Theorems of Boolean Algebra
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17. Laws and Theorems of Boolean Algebra
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18. Simplifying Logic Expressions
Combining terms
Use XY+XY’=X, X+X=X
Eliminating terms
Use X+XY=X
Eliminating literals
Use X+X’Y=X+Y
Adding redundant terms
Add 0: XX’
Multiply with 1: (X+X’)
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19. Theorems to Apply to Exclusive-OR
(Commutative law)
(Associative law)
(Distributive law)
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20. Karnaugh Maps
Convenient way to simplify logic functions of 3, 4, 5, (6) variables
Four-variable K-map
each square corresponds to one of the 16 possible minterms
1 - minterm is present; 0 (or blank) – minterm is absent;
X – don’t care
the input can never occur, or
the input occurs but the output is not specified
adjacent cells differ in only one value => can be combined
Location of minterms
Based on AND and OR
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21. Karnaugh Maps (cont’d)
Example
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22. Sum-of-products Representation
Function consists of a sum of prime implicants
Prime implicant
a group of one, two, four, eight 1s on a map represents a prime implicant if it cannot be combined with another group of 1s to eliminate a variable
Prime implicant is essential if it contains a 1 that is not contained in any other prime implicant
Why? K-map and SOP and POS, why?  AND and OR gates
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23. Selection of Prime Implicants
Two minimum forms
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24. Procedure for min Sum of products
1. Choose a minterm (a 1) that has not been covered yet
2. Find all 1s and Xs adjacent to that minterm
3. If a single term covers the minterm and all adjacent 1s and Xs, then that term is an essential prime implicant, so select that term
4. Repeat steps 1, 2, 3 until all essential prime implicants have been chosen
5. Find a minimum set of prime implicants that cover the remaining 1s on the map. If there is more than one such set, choose a set with a minimum number of literals
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25. Products of Sums F(1) = {0, 2, 3, 5, 6, 7, 8, 10, 11} F(X) = {14, 15}
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26. To Do Textbook Read Chapter 1.1, 1.2
Altera’s MAX+plus II and the UP1 Educational board: A User’s Guide, B. E. Wells, S. M. Loo
Altera University Program Design Laboratory Package
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