1. Instructor: Alexander Stoytchev
CprE 281: Digital Logic
Instructor: Alexander Stoytchev

2. Design Examples CprE 281: Digital Logic
Iowa State University, Ames, IA
Copyright © Alexander Stoytchev

3. Administrative Stuff HW3 is out It is due on Monday Feb 3 @ 4pm.
Please write clearly on the first page (in BLOCK CAPITAL letters) the following three things:
Your First and Last Name
Your Student ID Number
Your Lab Section Letter
Also, please
Staple your pages
Use Letter-sized sheets

4. Administrative Stuff TA Office Hours: David Johnstonam
Location: TLA (Coover Hall - first floor)
Pratik Mishra
2-4pm
Location: Durham Hall, room 309.

5. Administrative Stuff Homework Submission Guidelines
Please follow the guidelines that were ed to you.
Let me know if you did not get that .

6. Quick Review

7. The Three Basic Logic Gatesx 1 2 × x 1 2 + x
NOT gate
AND gate
OR gate
You can build any circuit using only these three gates
[ Figure 2.8 from the textbook ]

8. Figure B.21. A 7400-series chip. (a) Dual-inline package V GndDD
Gnd
(b) Structure of 7404 chip
Figure B A 7400-series chip.

9. Figure B.22. An implementation of f = x1x2 + x2x3.V DD x 1 2 3 f
7404
7408
7432

10. NAND Gate x1 x2 f 1

11. NOR Gate x1 x2 f 1

12. AND followed by NOT = NANDx 1 2 × x 1 2 × x1 x2 f 1 f 1 x1 x2 f 1

13. NAND followed by NOT = ANDx 1 2 × x 1 2 × x 1 2 × x 1 x 2 x1 x2 f 1 f 1 x1 x2 f 1

14. OR followed by NOT = NOR x 1 2 + x1 x2 f 1 f 1 x1 x2 f 1

15. NOR followed by NOT = OR x 1 2 + x 1 2 + x1 x2 f 1 f 1 x1 x2 f 1

16. Why do we need two more gates?
They can be implemented with fewer transistors.
(more about this later)

17. Building a NOT Gate with NANDx x x f 1 x 1
impossible
combinations
Thus, the two truth tables are equal!

18. Building an AND gate with NAND gates[

19. Building an OR gate with NAND gates[

20. Any Boolean function can be implemented
Implications
Any Boolean function can be implemented
with only NAND gates!

21. Implications Any Boolean function can be implemented
with only NAND gates!
The same is also true for NOR gates!

22. Another Synthesis Example

23. Truth table for a three-way light control
[ Figure 2.31 from the textbook ]

24. Minterms and Maxterms (with three variables)
[ Figure 2.22 from the textbook ]

25. Let’s Derive the SOP form

26. Let’s Derive the SOP form

27. Sum-of-products realizationx1 x3 x2
[ Figure 2.32a from the textbook ]

28. Let’s Derive the POS form
[ Figure 2.31 from the textbook ]

29. Let’s Derive the POS form

30. Product-of-sums realizationx3 x1 x2
[ Figure 2.32b from the textbook ]

31. Multiplexers

32. 2-1 Multiplexer (Definition)
Has two inputs: x1 and x2
Also has another input line s
If s=0, then the output is equal to x1
If s=1, then the output is equal to x2

33. Graphical Symbol for a 2-1 Multiplexer
[ Figure 2.33c from the textbook ]

34. Truth Table for a 2-1 Multiplexer
[ Figure 2.33a from the textbook ]

35. Let’s Derive the SOP form

36. Let’s Derive the SOP form

37. Let’s Derive the SOP form
Where should we
put the negation signs?
s x1 x2
s x1 x2
s x1 x2
s x1 x2

38. Let’s Derive the SOP form
s x1 x2
s x1 x2
s x1 x2
s x1 x2

39. Let’s Derive the SOP form
s x1 x2
s x1 x2
s x1 x2
s x1 x2
f (s, x1, x2) =
s x1 x2 +

40. Let’s simplify this expression
f (s, x1, x2) =
s x1 x2 +

41. Let’s simplify this expression
f (s, x1, x2) =
s x1 x2 +
f (s, x1, x2) =
s x1 (x2 + x2)
s (x1 +x1 )x2 +

42. Let’s simplify this expression
f (s, x1, x2) =
s x1 x2 +
f (s, x1, x2) =
s x1 (x2 + x2)
s (x1 +x1 )x2 +
f (s, x1, x2) =
s x1
s x2 +

43. Circuit for 2-1 Multiplexers
(c) Graphical symbol
(b) Circuit
[ Figure 2.33b-c from the textbook ]

44. More Compact Truth-Table Representation1
(a)
Truth
table s x1 x2
f (s, x1, x2) 1
f (s, x1, x2) s x1 x2
[ Figure 2.33 from the textbook ]

45. 4-1 Multiplexer (Definition)
Has four inputs: w0 , w1, w2, w3
Also has two select lines: s1 and s0
If s1=0 and s0=0, then the output f is equal to w0
If s1=0 and s0=1, then the output f is equal to w1
If s1=1 and s0=0, then the output f is equal to w2
If s1=1 and s0=1, then the output f is equal to w3

46. 4-1 Multiplexer (Definition)
Has four inputs: w0 , w1, w2, w3
Also has two select lines: s1 and s0
If s1=0 and s0=0, then the output f is equal to w0
If s1=0 and s0=1, then the output f is equal to w1
If s1=1 and s0=0, then the output f is equal to w2
If s1=1 and s0=1, then the output f is equal to w3
We’ll talk more about this when we get
to chapter 4, but here is a quick preview.

47. Graphical Symbol and Truth Table
[ Figure 4.2a-b from the textbook ]

48. The long-form truth table

49. The long-form truth table[

50. The long-form truth table[

51. The long-form truth table[

52. The long-form truth table[

53. 4-1 Multiplexer (SOP circuit)
[ Figure 4.2c from the textbook ]

54. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexerw w 1 1 f 1 w 2 w 3 1
[ Figure 4.3 from the textbook ]

55. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

56. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

57. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexer

58. Using three 2-to-1 multiplexers to build one 4-to-1 multiplexerw0 w1 s1 f s0 w2 w3

59. That is different from the SOP form of the 4-1 multiplexer shown below, which uses less gates

60. 16-1 Multiplexer s f w [ Figure 4.4 from the textbook ] 1 3 4 2 7 8 113 4 7 12 15 2 f
[ Figure 4.4 from the textbook ]

61. Display of numbers
[ Figure 2.34 from the textbook ]

62. Display of numbers

63. Display of numbers a = s0 c = s1 e = s0 g = s1 s0 f = s1 s0 d = s0

64. Questions?

65. THE END