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Serial versus Parallel Data Transfers
OUTLINE: Shift Registers Converting data from Serial Parallel 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
Shift Registers Shift Registers convert numbers expressed in terms of several bits (many signal lines) into a stream of 0, 1 and a Clock. Advantage: A convenient way to reduce the number of Electrical signal lines by factors of 8, 16, 32, 64. Disadvantage: For the same transfer rate the electronics must be faster by factors of 8, 16, 32, 64. 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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What do Shift Registers Do ?
$AA D7 H D6 L D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 H L 4 DFF Data_in Data_out Set Up Clock Set Up Set Up Set Up 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
Suppose you feed an ‘1’: D0 D1 D2 D3 D4 D5 D6 D7 1 T 2T 3T 4T 5T 6T 7T 8T 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
The 74HC165 Shift Register Serial Data In Serial Data Out 8-bit Word Clock *Load 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
The 74HC165 data 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
The 74HC164 Shift Register Serial Data In Parallel out Clock *Load 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Parallel becomes Serial
High Level Design Parallel becomes Serial We want to construct : 8-Bits of data (Parallel) ATmega103 Board Shift Register 74HC165 Serial Data PORTB Clock Shift/*Load Shift Register 74HC164 PORTC Serial to Parallel Clock 8-Bits of data (Parallel) 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
Low Level Design 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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The Memory Test Program
Start Shift 8 times Select new pattern Clock the 165 using PORTC Delay several seconds Look at the LEDs 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
Task Plan: Construct a device that will turn 8-bit parallel data from Port-B to serial data + clock . (2) Construct a device that will receive serial data, convert them to parallel data and display them using LEDs. (3) Write a program that will send several patterns down your ‘serial link’ and demonstrate that it works. 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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For more motivated students:
You can attempt storing your data in a register at the end before sending them to the LEDs. This will require knowledge on how a register really works Next few slides describe the 75HC574 register with 3-state outputs. 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Guess what is the 1 Byte memory ?
It exists in one package : E DAT-7 Q-7 74F574 Byte coming in Byte Stored Q-0 DAT-0 CLK 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
The data sheets of the 74F574 Register 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
What does the 74F574 do ? The outputs of the 574 are tri-state : They Can be high ‘1’, low ‘0’, and DISCONNECTED (HIGH IMPEDANCE STATE). 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
The 74F574 Truth Table 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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The Data Sheets of the 74F574 I
Register ts C2 DataIn tPZH EN1 DataOut Ts = setup time tPZH = Output Enable time 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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The Data Sheets of the 74F574 II
C2 DataIn EN1 DataOut tp Tp = propagation delay 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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Tim Sumner, Imperial College, Rm: 1009, x47552
Task II: Construct the following circuit: Make sure that after clocking the serial data eight times you also clock the data in to the register. 22/11/2018 Tim Sumner, Imperial College, Rm: 1009, x47552
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