1. Makefiles and the make utility
make is a unix utility
Organizes command-based tasks
Uses file timestamps to keep targeted files up to date
Useful for automating compilation of software projects
makefiles are used by make
Define which commands need to be run (and their syntax)
To establish dependencies between files
Macros can be defined and used for global options
Rules can be defined to simplify commands

2. Makefiles Consists of targets, dependencies, and commands
Basic syntax:
target: depend1 depend2 …
command [arg1] [arg2] …
[additional commands]
Note: command must be preceded by a tab (not spaces)!
For each target in the makefile
the timestamp of the target is compared to those of the dependencies
If a dependent file is newer than the target, the commands get executed
Dependent files may be targets themselves
Could trigger multiple commands as files get updated

3. Makefile flow example testdate depends on Date.o and TestDate.o
Date.o, in turn, depends on Date.cpp and Date.h
If, for example, Date.cpp is changed and make is executed
Date.o will be out of date
Causes execution of:
g++ -c Date.cpp $(DB)
Produces updated Date.o
Which then, causes execution of:
g++ -o testdate TestDate.o Date.o $(DB)
Result: recompiled testdate
Only the code necessary for updating is recompiled (TestDate.o is not changed)
DB=-g
testdate: Date.o TestDate.o
g++ -o testdate TestDate.o Date.o $(DB)
TestDate.o: TestDate.cpp Date.h
g++ -c TestDate.cpp $(DB)
Date.o: Date.cpp Date.h
g++ -c Date.cpp $(DB)
clean:
rm -f *.o testdate
lie:
echo "This is a great lecture"

4. Running make Execute “make” at the command prompt
By default, it will run command in a file called makefile or Makefile
To run any other file name, use the –f option
make –f somefile
By default, make will attempt to update the first target it encounters in the makefile
To select a different target, simply add it to the argument list
make target1 [target2 …]
Multiple targets are permitted
Commands will be echoed to the terminal as they are run

5. Makefile macros DB is a macro make clean It is invoked as $(DB)
DB=-g
testdate: Date.o TestDate.o
g++ -o testdate TestDate.o Date.o $(DB)
TestDate.o: TestDate.cpp Date.h
g++ -c TestDate.cpp $(DB)
Date.o: Date.cpp Date.h
g++ -c Date.cpp $(DB)
clean:
rm -f *.o testdate
lie:
echo "This is a great lecture"
DB is a macro
It is invoked as $(DB)
Resulting command for Date.o target is:
g++ -c Date.cpp –g
which compiles for debugging
make clean
Does not create/update a file called clean
It simply runs the rm command to remove all compiled results
Similar behavior for make lie!

6. Makefile rules rule: %.o: %.cpp … Built-in macros:
For any .cpp file, make the corresponding .o with the given rule
Built-in macros:
left side of “:” separator
$^: right side of “:” separator
$<: first argument on right side
CC=g++
CFLAGS=-g
DEPS = Date.h
OBJ = Date.o TestDate.o
%.o: %.cpp $(DEPS)
$(CC) -c -o $< $(CFLAGS)
testdate: $(OBJ)
$(CC) -o $^ $(CFLAGS)