1. BASIC & COMBINATIONAL LOGIC CIRCUIT
CHAPTER 3
BASIC & COMBINATIONAL LOGIC CIRCUIT

3. Introduction to basic gates
Analyzing combinational logic circuits.
Designing a logic circuit from Boolean expression
Designing a logic circuit from truth table
Boolean theorem and Karnaugh-map approach
Universality of the NAND and NOR gates

4. Contents 3.1 Introduction to Basic Gates
3.2 Analysing A Combinational Logic Circuit
3.3 Boolean Theorem
3.4 Karnaugh-map Approach
3.5 Design A Combinational Logic Circuit From Truth Table
3.6 Design A Combinational Logic Circuit From Boolean Expression
3.7 Universality of NAND and NOR Gate

5. Learning Outcomes At the end of this chapter, you should be able to
Describe the operation of NOT, AND, OR, NAND, NOR, XOR and XNOR gates and express them with Boolean expression
Design a combinational logic circuit for a given Boolean output expression and truth table
Simplify a combinational logic circuit to its minimum form
Use NAND or NOR gates to implement any combinational logic function.

6. 3.1 Introduction to Basic Gates
There are 7 basic gates available:
INVERTER gate
AND gate
OR gate
NAND gate
NOR gate
XOR gate
XNOR gate
Important terminology:
Boolean expression, truth table, timing diagram, schematic diagram, SOP, POS

7. INVERTER Gate Also known as NOT gate.
It changes one logic level to the opposite level
The symbol is
Truth table Boolean expression

8. For INVERTER, the timing diagram is
A graph that accurately displays the relationship of two or more waveforms with each other on time basis.
For INVERTER, the timing diagram is

9. AND Gate AND gate can have two or more inputs but only 1 output.
Operation: logical multiplication.
Output is HIGH only when all the inputs are HIGH.
The symbol is

10. Truth table
Timing diagram
Boolean expression

11. OR Gate OR gate can have two or more inputs but only 1 output.
Operation: logical addition.
Output is LOW only when all the inputs are LOW.
The symbol is

12. Truth table
Timing diagram
Boolean expression

13. NAND Gate NAND gate can have two or more inputs but only 1 output.
Operation: in combination AND, OR and INVERTER
Output is LOW only when all the inputs are HIGH.
The symbol is

14. Truth table
Timing diagram
Boolean expression

15. NOR Gate NOR gate can have two or more inputs but only 1 output.
Operation: in combination AND, OR and INVERTER
Output is HIGH only when all the inputs are LOW.
The symbol is

16. Truth table
Timing diagram
Boolean expression

17. XOR Gate XOR gate can have two or more inputs but only 1 output.
Output is HIGH only when the inputs are at opposite logic levels.
The symbol is

18. Truth table
Timing diagram
Boolean expression

19. XNOR Gate XNOR gate can have two or more inputs but only 1 output.
Output is LOW only when the inputs are at opposite logic levels.
The symbol is

20. Truth table
Timing diagram
Boolean expression

21. 5th lecture
24th September 2013

22. 3.2 Analysing a Combinational Logic Circuit
In digital system, different gates are connected together to perform different function  combinational logic circuit
Obtain the Boolean expression and analyse it to form the truth table for that particular combinational logic circuit.

23. Example 1
Build the truth table for the combinational logic circuit below.

24. Example 2
Build the truth table for the combinational logic circuit shown below.
b = A + B’
Z = (a + b)’ = (A+B’ + CB’)’ B’
a = C  B’

25. Your final Truth Table is
Then we can fill-in the truth table
Your final Truth Table is

26. Example 3
Build the truth table for the combinational logic circuit shown below.
a = AB
c = (a+C)’
Z = b  c = (BC)’  (AB + C)’
b = (BC)’

27. From previous slide, we know that the Boolean expression for the output Z is
Next, we can fill-in the output part of the truth table

28. 3.3 Design A Combinational Logic Circuit From Boolean Expression
To draw a logic circuit,
Step 1: Group the variables together in a bracket
Step 2: Start to draw from either input or output

29. Example Design a combinational logic circuit for Boolean expression
AB’C
((BC)’+C)’
(BC)’

31. 3.4 Design A Combinational Logic Circuit From Truth Table
To draw a circuit, we must obtain the Boolean expression from the truth table using SOP (Sum-of-Product)
Product term is defined as a term consisting of Boolean multiplication of variables or their complements.
When 2 or more product terms are summed  SOP
Each row of truth table represents an input combination  product term (a.k.a minterm)

32. For example, if a system has 3 inputs, then the minterms are as follows
minterm 0 (m0)
minterm 1 (m1)
minterm 2 (m2)
minterm 3 (m3)
minterm 4 (m4)
minterm 5 (m5)
minterm 6 (m6)
minterm 7 (m7)

33. Example
Design a combinational logic circuit that produces a truth table below.
Input
Output
Product term A B C Z 1
For SOP, consider the outputs that produce ‘1’ m7 m4 m1
Therefore we could express Z as
Z = m1 + m4 + m7 or Z(A,B,C) =  m (1,4,7)  canonical form

34. From the truth table, we know that the Boolean expression for the output Z is
YOUR CIRCUIT IS…

35. 27th September 2013
6th lecture

36. 3.5 Boolean Theorem Boolean algebra is the maths of digital systems.
There are 3 terms used in Boolean:
Variable is a symbol used to represent a logical quantity.
Complement is the inverse of a variable (indicated by a bar or an apostrophe)
Literal is a variable or a complement
This theorem is important in reducing the Boolean expression to its simplest form.

37. COMMUTATIVE LAW
Rule 1 : A + B = B + A
Rule 2 : A  B = B  A

38. ASSOCIATIVE LAW Rule 3 : A + (B + C) = (A + B) + C = A + B + C

39. DISTRIBUTIVE LAW Rule 5a : A  (B + C) = A  B + A  C
Rule 5b :(A + B)  (C + D) = A  C + A  D + B  C + B  D

40. SINGLE VARIABLE THEOREM
Rule 6 : A = A
Rule 7 : A  0 = 0
Rule 8 : A  1 = A
Rule 9 : A  A = A
Rule 10: A  A = 0
Rule 11: A + 0 = A
Rule 12: A + 1 = 1
Rule 13: A + A = A
Rule 14: A + A = 1
Rule 15: A + AB = A
Rule 16: A + AB = A + B

41. DEMORGAN’S THEOREM Theorem 1
The complement of a sum of variables is equal to the product of the complements of the variables
Rule 17 : A + B = A  B

42. DEMORGAN’S THEOREM (cont.)
The complement of a product of variables is equal to the sum of the complements of the variables
Rule 18 : A  B = A + B

43. DEMORGAN’S THEOREM (cont.)
The easiest way to understand this theorem is to break (or connect) bar above the sign that change.

44. Example 1 Simplify the expression Z = (AB + C)(A + BC)
SOLUTION:
Z = (AB + C)(A + BC)
= (AB + C) + (A + BC)
= (AB)C + A(BC)
= (A + B)C + A(B + C)
= AC + BC + AB + AC
= AC + BC + AB
Rule 18 : Demorgan’s theorem
Rule 17 : Demorgan’s theorem
Rule 18 : Demorgan’s theorem
Rule 5 : Distributive law
Rule 13 : Single variable theorem

45. Example 2 Simplify the expression Z = A + BC + D(E + F)
SOLUTION:
Z = A + BC + D(E + F)
= (A + BC)  (D(E + F))
= (A + BC)  (D+(E + F))
= (A + BC)  (D + E + F)
Rule 17 : Demorgan’s theorem
Rule 6 & 18
Rule 6
Your final answer !

46. Example 3 Simplify the circuit shown below using the Boolean algebra.
Solution:
Z = A + ((BC) + A’)
= A + (BC) + A’
= 1 + (BC)
= 1

47. Exercise 1 Using Boolean identities, simplify the following
expressions:
X = A + C’D + CDE + A’B
Z = (AB’ + C + D)(A’ + B + C + D + E)
Answers: X=A+B+C’D+DE, Z=C+D+AB’E

48. Exercise 2
Determine which of the following logic gate behaves as an OR gate.
(a) (b)
(a) (b)

49. 1st Oct 2013
7th lecture

50. 3.6 Karnaugh-Map Approach
K-map is the graphical approach for minimising the logic function by obtaining:
Minimum Sum-of-Product (MSOP), or
Minimum Product-of-Sum (MPOS)
Keep the variables’ order for correct and easy mappings

51. K-map mapping
The mapping of K-map for 3 variables and 4-variables respectively.
3-variables
4-variables C AB 1 00
A’B’C’
A’B’C 01
A’BC’
A’BC 11
A B C’
A B C 10
A B’ C’
A B’ C CD AB 00 01 11 10
A’B’C’D’
A’B’C’D
A’B’C D
A’B’C D’
A’B C’D’
A’BC’D
A’BC D
A’BC D’
A B C’D’
A B C’D
A B C D
A B C D’
A B’ C’D’
A B’ C’D
A B’ C D
A B’ C D’
NOTICE THE SEQUENCE : Only 1 VARIABLE is changed between ADJACENT cell

52. MSOP Approach There are 4 steps involved in this approach:
Map the output in K-map
Step 2
Group the 1’s together
Step 3
Determine the minimum product term for each group
Step 4
Sum all the terms to form the minimum SOP (MSOP) expression

53. Step 1: Mapping the Output
From truth table  K–map C AB
input
output A B C Z
A’ B’ C’ 
A’ B’ C 1
A’ B C’ 2
A’ B C 3
A B’ C’ 4
A B’ C 5
A B C’ 6
A B C 7 1 00 ? 01 11 10 A BC 00 01 11 10 ? 1

54. Step 1: Mapping the Output
From truth table  K–map C AB
input
output A B C Z
A’ B’ C’ 
A’ B’ C 1
A’ B C’ 2
A’ B C 3
A B’ C’ 4
A B’ C 5
A B C’ 6
A B C 7 1 00 01 2 3 11 6 7 10 4 5 A BC 00 01 11 10 1 3 2 4 5 7 6

55. Step 2: Group the 1’s together
First, get to know the adjacent cell:
Each cell is adjacent to the cell at its right, left, above and below.

56. Step 2: Group the 1’s together (cont.)
Each cell at the outer left column is adjacent to the corresponding cell at its outer right corner (‘wrap around’ adjacency).

57. Step 2: Group the 1’s together (cont.)
Each cell at the top row is adjacent to the corresponding cell at the bottom row (‘wrap around’ adjacency).

58. Step 2: Group the 1’s together (cont.)
GOAL :
to maximise the size of the groups and to minimise the number of groups

59. Step 2: Group the 1’s together (cont.)
RULES to follow :
A group must contain either 1, 2, 4, 8 or 16 cells (must be in power of 2)
Each cell in a group must be adjacent to one or more cells in that same group, but all cells in the group do not have to be adjacent to each other
Always include the largest possible number of 1s in a group in accordance with Rule 1.
Each 1 on the map must be included in at least one group. The 1’s already in a group can be included in another group as long as the overlapping groups include non-common 1’s.

60. Step 2: Group the 1’s together (cont.)
RULE 1: A group must contain either 1, 2, 4, 8 or 16 cells (must be in power of 2)

61. RULE 2:. Each cell in a group must be adjacent to one or more
RULE 2: Each cell in a group must be adjacent to one or more cells in that same group, but all cells in the group do not have to be adjacent to each other

62. RULE 3:. Always include the largest possible number of 1s in
RULE 3: Always include the largest possible number of 1s in a group in accordance with Rule 1.

63. RULE 4:. Each 1 on the map must be included in at least one. group
RULE 4: Each 1 on the map must be included in at least one group. The 1’s already in a group can be included in another group as long as the overlapping groups include non-common 1’s.

64. Step 3: Determine the minimum product term for each group
Variables that occur both uncomplemented and complemented within the group (a.k.a. contradictory variables) are eliminated.

65. Step 3: Determine the minimum product term for each group
For a 3-variable k-map:
A 1-cell group produces a 3-variable product term
A 2-cell group produces a 2-variable product term
A 4-cell group produces a 1-variable product term
An 8-cell group produces a value of 1

66. Step 3: Determine the minimum product term for each group
For a 4-variable k-map:
A 1-cell group produces a 4-variable product term
A 2-cell group produces a 3-variable product term
A 4-cell group produces a 2-variable product term
An 8-cell group produces a 1-variable product term
A 16-cell group produces a value of 1

67. Step 4: Sum all the terms to form the MSOP expression
Once we have determined the SOPs, we add them up to obtain the minimum expression of SOP(MSOP)

68. Example 1 1 Use a K-map to find the MSOP expression for Z 00 C AB 01
input
output A B C Z 1 C AB 1 00 01 11 10
SOLUTION
Step 1: Mapping the K-map

69. Example 1 (cont.) 1 Use a K-map to find the MSOP expression for Z 00 C
input
output A B C Z 1 C AB 1 00 01 11 10
SOLUTION
Step 2: Group the 1s together

70. Example 1 (cont.) 1 Use a K-map to find the MSOP expression for Z 00
input
output A B C Z 1
A’B’ C AB 1 00 01 11 10
A’C
SOLUTION
Step 3: Determine the SOPs
AC’

71. Example 1 (cont.) 1 Use a K-map to find the MSOP expression for Z 00
input
output A B C Z 1
A’B’ C AB 1 00 01 11 10
A’C
SOLUTION
Step 4: Sum all the SOPs to obtain MSOP
Your final answer is
Z = A’B’ + A’C + AC’
AC’

72. 04 Oct 2013
8th lecture

73. Example 2
Obtain the simplest form of SOP for the Boolean expression below
Z = A’B’C’D’ + A’B’C’D + A’B’CD’ + A’BC’D’ + A’BC’D + A’BCD’ + AB’C’D’ + AB’CD’ + ABCD AB CD 00 01 11 10

74. Obtain the simplest form of SOP for the Boolean expression below
Z = A’B’C’D’ + A’B’C’D + A’B’CD’ + A’BC’D’ + A’BC’D + A’BCD’ + AB’C’D’ + AB’CD’ + ABCD AB CD 00 01 11 10 1

75. Obtain the simplest form of SOP for the Boolean expression below
Z = A’B’C’D’ + A’B’C’D + A’B’CD’ + A’BC’D’ + A’BC’D + A’BCD’ + AB’C’D’ + AB’CD’ + ABCD AB CD 00 01 11 10 1

76. Z = A’C’ + A’D’ + B’D’ + ABCD
Obtain the simplest form of SOP for the Boolean expression below
Z = A’B’C’D’ + A’B’C’D + A’B’CD’ + A’BC’D’ + A’BC’D + A’BCD’ + AB’C’D’ + AB’CD’ + ABCD AB CD 00 01 11 10 1
Your final answer is
Z = A’C’ + A’D’ + B’D’ + ABCD
B’D’
A’C’
ABCD
A’D’

77. MPOS Approach There are 4 steps involved in this approach:
Map the output in K-map
Step 2
Group the 0’s together
Step 3
Determine the factors correspond to each group (remember to complement the variables)
Step 4
AND all the factors to form the minimum POS (MPOS) expression

78. Example 3
Use a K-map to find the MPOS expression for Z. Draw the logic circuit from this MPOS expression.
input
output A B C Z 1
Answer: Z = (A+C)(A’+B+C’)

79. Example 3
Use a K-map to find the MPOS expression for Z. Draw the logic circuit from this MPOS expression.
(A’C’)’=A+C
input
output A B C Z 1 C AB 1 00 01 11 10
(AB’C)’=
A’+B+C’
Answer: Z = (A+C)(A’+B+C’)

80. Example 4
Use K-maps to find the MPOS for each function defined by this truth-table.
input
output A2 A1 A0 Z2 Z1 1

81. 3.6.1 The Don’t Care Outputs
Often in designing a digital system, certain components of the system will never have all possible combinations of inputs.
For example, system X may not have inputs of A = 1, B = 1, C = 0 and A = 1, B = 0, C = 0. So put X (don’t care) at the outputs of these combinations of inputs.
input
output A B C Z 1 x A BC 00 01 11 10 1 x

82. Example 5 AB CD 00 01 11 10 1 X AD’ AB’C’ A’BC’ Your final answer is
Consider the K-map below. Find the MSOP expression for Z. AB CD 00 01 11 10 1 X
AD’
AB’C’
A’BC’
Your final answer is
Z = AD’ + A’BC’ + AB’C’

83. Exercise
Use K-map to obtain MSOP and MPOS for the following functions:
Z1 = A’B’C + ABC + AB’C’ + A’BC with a don’t care for ABC = 101.

84. Example 7
System A (which has four inputs, A,B,C and D and an output, Y ) is used to produce a high output whenever both inputs A and C are high or when input B is low. Design a combinational logic circuit for system A.

85. Solution
From the statement high output is produced whenever both inputs A and C are high or when input B is low,
Logic circuit is
Note:
For this example, we are able to get the simplest Boolean expression from the statement itself. Hence, we do not need to draw the truth table and K-map.

86. 3.7 Universality of NAND and NOR Gate
NAND and NOR gates are called universal circuits because they can be used to produce NOT, AND, OR and NOR functions.
We could design combinational logic circuits using only these gates.

87. Universality of NAND gate

88. Universality of NOR gate

89. Designing circuits using only NAND gates
We could design combinational logic circuits using only NAND gates.
There are 2 approaches:
Direct translation method
Replace the gates other than NAND with the equivalent NAND gate
(Number of gates are not minimised)
Boolean manipulation method
Use Boolean theorem to transform the expression into a NAND gate only expression
(Number of gates are minimised)

90. Example
Redraw the logic circuit shown below using only NAND gates.

91. Solution 1: using Direct Translation
Total NAND gates: 8

92. Solution 2: using Boolean Manipulation
First, obtain the Boolean expression for Z
Z = (AB)+(CD)
Then, use Boolean theorem to manipulate it into NAND form (i.e. remove the + sign).
Z = (AB)+(CD)
= (AB)(CD)
Total NAND gates: 4

93. Designing circuits using only NOR gates
We could design combinational logic circuits using only NOR gates.
There are 2 approaches:
Direct translation method
Replace the gates other than NOR with the equivalent NOR gate
(Number of gates are not minimised)
Boolean manipulation method
Use Boolean theorem to transform the expression into a NOR gate only expression
(Number of gates are minimised)

94. Example
Redraw the logic circuit shown below using only NOR gates.

95. Solution 1: using Direct Translation
Total NOR gates: 12

96. Solution 2: using Boolean Manipulation
First, obtain the Boolean expression for Z
Z = A(BC)D
Then, use Boolean theorem to manipulate it into NOR form (i.e. remove the  sign).
Z = A(BC)D
= A+(BC)D
= A+(B+C)D
= A+(B+C)+D
Total NAND gates: 4

97. Summary Two methods to simplify Boolean expressions:
Boolean algebra
Karnaugh map
There are 4 steps in designing a combinational logic circuit for any application:
Obtain the Boolean equation to explain the system’s operation
Draw the truth table.
Apply simplification methods (see above).
Draw the schematic circuit.

98. Reference
Thomas L. Floyd, Digital Fundamentals (9th edition), Pearson, 2006

99. Exercise 1
Using Boolean identities, simplify the following expressions:
X = A + C’D + CDE + A’B
Y = AC’(B + D) + B’D’ + C
Z = (AB’ + C + D)(A’ + B + C + D + E)
Answers: X=A+B+C’D+DE, Y=A+C+B’D’, Z=C+D+AB’E