1. Day 31: November 23, 2011 Crosstalk
ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems
Day 31: November 23, 2011
Crosstalk
Penn ESE370 Fall DeHon

2. Today Crosstalk How arise Consequences Magnitude Avoiding
Penn ESE370 Fall DeHon

3. Capacitance There are capacitors everywhere Already talked about
Wires as capacitors
Capacitance between terminals on transistor
Penn ESE370 Fall DeHon

4. Miller Effect For an inverting gate
Capacitance between input and output must swing 2 Vhigh
Or…acts as double-sized capacitor
Penn ESE370 Fall DeHon

5. Capacitance Everywhere
Potentially a capacitor between any two conductors
On the chip
On the package
On the board
All wires
Package pins
PCB traces
Cable wires
Bit lines
Penn ESE370 Fall DeHon

6. Capacitor Dependence Decrease with conductor separation
Increase with size
Depends on dielectric
Penn ESE370 Fall DeHon

7. Parallel Wires Parallel-plate capacitance between wires
Penn ESE370 Fall DeHon

8. Wire Capacitance
Changes in voltage on one wire may couple through capacitance to another
Penn ESE370 Fall DeHon

9. Consequences
Qualitative First
Penn ESE370 Fall DeHon

10. Driven Wire What happens to a driven wire?
Penn ESE370 Fall DeHon

11. Driven Wire Can this be a problem? Victim Clock line
Asynchronous control
Non-clock used in synchronous system
Outputs sampled at clock edge
Penn ESE370 Fall DeHon

12. Undriven Wire What happens to undriven wire?
Where do we have undriven wires?
Penn ESE370 Fall DeHon

13. Clocked Logic CMOS driven lines Clocked logic
Willing to wait to settle
Impact is solely on delay
May increase delay of transitions
Penn ESE370 Fall DeHon

14. Magnitude
Quantitative
Penn ESE370 Fall DeHon

15. How large is the noise? V1 transitions from 0 to V?
Penn ESE370 Fall DeHon

16. How large is the noise? V1 transitions from 0 to V
Penn ESE370 Fall DeHon

17. Noise Magnitude
Penn ESE370 Fall DeHon

18. SPICE C1=10pF, C2=20pF
Penn ESE370 Fall DeHon

19. Good (?) Capacitance High capacitance to ground plane
Limits node swing from adjacent conductors
Penn ESE370 Fall DeHon

20. Driven Line What happens when victim line is driven?
Penn ESE370 Fall DeHon

21. Driven Line Driven line Recovers with time constant: R2(C1+C2)
Penn ESE370 Fall DeHon

22. Spice: R2=1K, C1=10pF, C2=20pF
Penn ESE370 Fall DeHon

23. Magnitude of Noise on Driven Line
Magnitude of diversion depends on relative time constants
t1, t2
t1<< t2
full diversion, then recover
t1>> t2
Charge capacitor faster than line 1 can change
little noise
Penn ESE370 Fall DeHon

24. Magnitude of Noise on Driven Line
Magnitude of diversion depends on relative time constants
t1, t2
t1<< t2
t1>> t2
Penn ESE370 Fall DeHon

25. Spice: C1=1pF, C2=2pF
Penn ESE370 Fall DeHon

26. Simultaneous Transition
What happens if transition in opposite directions?
Penn ESE370 Fall DeHon

27. Simultaneous Transition
What happens if transition in opposite directions?
Must charge C1 by 2V
Or looks like 2C1 between wires
Penn ESE370 Fall DeHon

28. Where Arise
Penn ESE370 Fall DeHon

29. Cables and PCB Wires
Source;
Penn ESE370 Fall DeHon

30. Printed Circuit Board
Source:
Penn ESE370 Fall DeHon

31. Interconnect Cross Section
Image from Rabaey text, pg48, Fig2-7k
ITRS 2007 31
Penn ESE370 Fall DeHon 31

32. IC Metalization
Source:
Penn ESE370 Fall DeHon

33. Standard Cell Area inv nand3 All cells uniform height Width of channel
determined
by routing
Cell area
Identify the full custom and standard cell regions on 386DX die
Penn ESE370 Fall DeHon

34. Wires
Will be capacitively coupled to many adjacent wires of varying degrees
Penn ESE370 Fall DeHon

35. bit lines, word lines wordline bitline Penn ESE370 Fall2011 -- DeHon
Source:

36. Addressing
Penn ESE370 Fall DeHon

37. What can we do?
How can we reduce?
Penn ESE370 Fall DeHon

38. What can we do? Orthogonal routing layers Widen spacing between wires
Avoid parallel coupling vertically
Widen spacing between wires
Particularly critical path wires
Limit length two wires run in parallel
Separate with power planes
Separate with ground/power wires
Penn ESE370 Fall DeHon

39. Admin HW6 Out by time return from break Next week Project 3 out
Lecture Monday and Wednesday
Lab on Friday
Penn ESE370 Fall DeHon

40. Idea Capacitance is everywhere Especially between adjacent wires
Will get “noise” from crosstalk
Clocked and driven wires
Slow down transitions
Undriven wires voltage changed
Can cause spurious transitions
Penn ESE370 Fall DeHon