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Anthony Li Alec Wasowicz
HKN ECE 342 Review Session 1 Anthony Li Alec Wasowicz
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KVL/KCL Sum of all voltages in a loop is 0
Sum of current entering a node equals sum of current exiting a node
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Incremental/Small Signal Model
Can be numerically derived from Taylor Series approximation (up to first- order term) Taylor Series: y = f(x0) + f’(x0)(x - x0) + f’’(x0)(x-x0)2/
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MOSFET’s
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MOSFET Operating Point
Three regions of operation: Cutoff (VG < VT): ID = 0 Linear/Triode (VG > VT, VDS < VGS - VT): ID = μn/pCox(W/L)((VGS - VT)VDS - VDS2/2) Saturation (VG > VT, VDS > VGS - VT), ID = μn/pCox(W/L)(½)(VGS - VT)2
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