1. EE 5340 Semiconductor Device Theory Lecture 12 - Fall 2009
Professor Ronald L. Carter

2. Soln to Poisson’s Eq in the D.R.Ex
W(Va-dV)
W(Va)
-xp xn x
-xpc
xnc
-Emax(V)
-Emax(V-dV)
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3. Effect of V  0
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4. Charge neutrality => Qp’ + Qn’ = 0, => Naxp = Ndxn
Junction C (cont.) r
+Qn’=qNdxn
+qNd
dQn’=qNddxn
-xp x
-xpc xn
xnc
-qNa
Charge neutrality => Qp’ + Qn’ = 0, => Naxp = Ndxn
dQp’=-qNadxp
Qp’=-qNaxp
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5. Junction Capacitance
The junction has +Q’n=qNdxn (exposed donors), and (exposed acceptors) Q’p=-qNaxp = -Q’n, forming a parallel sheet charge capacitor.
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6. Junction C (cont.)
So this definition of the capacitance gives a parallel plate capacitor with charges dQ’n and dQ’p(=-dQ’n), separated by, L (=W), with an area A and the capacitance is then the ideal parallel plate capacitance.
Still non-linear and Q is not zero at Va=0.
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7. Junction C (cont.)
The C-V relationship simplifies to
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8. Junction C (cont.)
If one plots [Cj]-2 vs. Va Slope = -[(Cj0)2Vbi]-1 vertical axis intercept = [Cj0]-2 horizontal axis intercept = Vbi
Cj-2
Vbi Va
Cj0-2
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9. Junction Capacitance Estimate CJO Define y  Cj/CJO
Calculate y/(dy/dV) = {d[ln(y)]/dV}-1
A plot of r  y/(dy/dV) vs. V has slope = -1/M, and intercept = VJ/M
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10. dy/dx - Numerical Differentiation
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11. Practical Junctions
Junctions are formed by diffusion or implantation into a uniform concentration wafer. The profile can be approximated by a step or linear function in the region of the junction.
If a step, then previous models OK.
If linear, let the local charge density r=qax in the region of the junction.
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12. Practical Jctns (cont.)
Na(x) N N
Shallow (steep) implant
Na(x)
Linear approx.
Box or step junction approx. Nd Nd
Uniform wafer con
x (depth)
x (depth) xj
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13. Linear graded junction
Let the net donor concentration, N(x) = Nd(x) - Na(x) = ax, so r =qax, -xp < x < xn = xp = xo, (chg neu)
r = qa x r
Q’n=qaxo2/2
-xo x xo
Q’p=-qaxo2/2
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14. Linear graded junction (cont.)
Let Ex(-xo) = 0, since this is the edge of the DR (also true at +xo)
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15. Linear graded junction (cont.)Ex
-xo xo x
-Emax
|area| = Vbi-Va
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16. Linear graded junction (cont.)
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17. Linear graded junction, etc.
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18. Doping Profile
If the net donor conc, N = N(x), then at x, the extra charge put into the DR when Va->Va+dVa is dQ’=-qN(x)dx
The increase in field, dEx =-(qN/e)dx, by Gauss’ Law (at x, but also all DR).
So dVa=-xddEx= (W/e) dQ’
Further, since qN(x)dx, for both xn and xn, we have the dC/dx as ...
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19. Arbitrary doping profile (cont.)
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20. Arbitrary doping profile (cont.)
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21. Arbitrary doping profile (cont.)
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22. Arbitrary doping profile (cont.)
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23. Example
An assymetrical p+ n junction has a lightly doped concentration of 1E16 and with p+ = 1E18. What is W(V=0)?
Vbi=0.816 V, Neff=9.9E15, W=0.33mm
What is C’j0? = 31.9 nFd/cm2
What is LD? = 0.04 mm
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24. Reverse bias junction breakdown
Avalanche breakdown
Electric field accelerates electrons to sufficient energy to initiate multiplication of impact ionization of valence bonding electrons
field dependence shown on next slide
Heavily doped narrow junction will allow tunneling - see Neamen*, p. 274
Zener breakdown
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25. Effect of V  0
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26. Ecrit for reverse breakdown [M&K]
Taken from p. 198, M&K**
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27. Reverse bias junction breakdown
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28. Ecrit for reverse breakdown [M&K]
Taken from p. 198, M&K**
Casey Model for Ecrit
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29. Reverse bias junction breakdown
Assume -Va = VR >> Vbi, so Vbi-Va-->VR
Since Emax~ 2VR/W = (2qN-VR/(e))1/2, and VR = BV when Emax = Ecrit (N- is doping of lightly doped side ~ Neff)
BV = e (Ecrit )2/(2qN-)
Remember, this is a 1-dim calculation
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30. Junction curvature effect on breakdown
The field due to a sphere, R, with charge, Q is Er = Q/(4per2) for (r > R)
V(R) = Q/(4peR), (V at the surface)
So, for constant potential, V, the field, Er(R) = V/R (E field at surface increases for smaller spheres)
Note: corners of a jctn of depth xj are like 1/8 spheres of radius ~ xj
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31. BV for reverse breakdown (M&K**)
Taken from Figure 4.13, p. 198, M&K**
Breakdown voltage of a one-sided, plan, silicon step junction showing the effect of junction curvature.4,5
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32. References
[M&K] Device Electronics for Integrated Circuits, 2nd ed., by Muller and Kamins, Wiley, New York, 1986.
[2] Devices for Integrated Circuits: Silicon and III-V Compound Semiconductors, by H. Craig Casey, Jr., John Wiley & Sons, New York, 1999.
Bipolar Semiconductor Devices, by David J. Roulston, McGraw-Hill, Inc., New York, 1990.
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