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Number Systems Decimal (base 10) { }

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1 Number Systems Decimal (base 10) {0 1 2 3 4 5 6 7 8 9}
Place value gives a logarithmic representation of the number Ex means 4 X 103 = 4000 3 X 102 = 300 7 X 101 = 8 X 100 = The place also gives the exponent of the base

2 Example 432,600 105 104 103 100 101 102 Powers of ten: 100 = = = 10000 101 = = =

3 Binary (base 2) {0 1} Binary Decimal 1 10 2 11 3 100 4 101 5 110 6 111
1 10 2 11 3 100 4 101 5 110 6 111 7 1000 8 1001 9 1010

4 Example 27 26 25 20 21 22 24 23

5 Decimal Equivalent 1101 1001 1 X 27 = 128 + 1 X 26 = 64 + 0 X 25 = 0
217 Notice how powers of two stand out: 20 = 1 21 = 10 22 = 100 23 = 1000

6 Decimal to Binary Conversion
Ex. 575 Find the largest power of two less than the number 29 = 512 Subtract that power of two from the number 575 – 512 = 63 Repeat steps 1 and 2 for the new result until you reach zero. 25 = – 32 = 31 24 = – 16 = 15 23 = – 8 = 7 22 = – 4 = 3 21 = – 2 = 1 20 = – 1 = 0 Construct the number

7 Another Example 144 Result 10010000 27 = 128 144 – 128 = 16
27 = – 128 = 16 24 = – 16 = 0 Result

8 Hexadecimal (base 16) {0 1 2 3 4 5 6 7 8 9 A B C D E F} Assignments
8 1 9 2 10 A 3 11 B 4 12 C 5 13 D 6 14 E 7 15 F

9 Example 163 162 160 161 3 B 6 E 3 X 163 = 12288 11 X 162 = 6 X 161 = 14 X 160 =

10 Hexadecimal is Convenient for Binary Conversion
1001 9 1 1010 A 10 2 1011 B 11 3 1100 C 100 4 1101 D 101 5 1110 E 110 6 1111 F 111 7 1 0000 1000 8  Nibble

11 Binary to Hex Conversion
Group binary number by fours (nibbles) Convert each nibble into hex equivalent D

12 Decimal to Hex Conversion
162 = – 256 = 28 161 = = 12 (Hex C) Result C

13 Another Example with an Extension
1054 162 = 256 But we have several multiples of 256 in 1054 1054/256 = take integer part This eliminates 4*256 = 1024 1054 – 1024 = 30 161 = – 16 = 14 (Hex E) Result E

14 Truth Table Binary Decimal Hexadecimal 0000 0001 0010 0011 0100 0101
0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111

15 Truth Table Binary Decimal Hexadecimal 0000 0001 1 0010 2 0011 3 0100
0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 1001 9 1010 10 A 1011 11 B 1100 12 C 1101 13 D 1110 14 E 1111 15 F

16 Sexagesimal (Base 60)

17 Practice Convert 212 decimal to binary 212 – 27 = 84 84 – 26 = 20
20 – 24 = 4 4 – 22 = 0 Result:

18 More Practice Convert 1101 0010 binary to hex 0010 = 2 1101 = 13 = D
Result D2

19 Notation Some books use a subscript to denote the base.
Ex: 1210 = 12 decimal 1216 = 12 hex = 18 decimal

20 Logic Gates

21 Transistors as Switches
VBB voltage controls whether the transistor conducts in a common base configuration. Logic circuits can be built

22 Boolean Algebra

23 AND In order for current to flow, both switches must be closed
Logic notation AB = C (Sometimes AB = C) A B C 1

24 OR Current flows if either switch is closed Logic notation A + B = C A
1

25 Properties of AND and OR
Commutation A + B = B + A A  B = B  A Same as Same as

26 Commutation Circuit A  B B  A B + A A + B

27 Properties of AND and OR
Associative Property A + (B + C) = (A + B) + C A  (B  C) = (A  B)  C =

28 Properties of AND and OR
Distributive Property A + B  C = (A + B)  (A + C) A + B  C A B C Q 1

29 Distributive Property
(A + B)  (A + C) A B C Q 1

30 Notice that the carry results are the same as AND
Binary Addition A B S C(arry) 1 Notice that the carry results are the same as AND C = A  B

31 Inversion (NOT) A Q 1 Logic:

32 Exclusive OR (XOR) Either A or B, but not both This is sometimes called the inequality detector, because the result will be 0 when the inputs are the same and 1 when they are different. The truth table is the same as for S on Binary Addition. S = A  B A B S 1

33 Getting the XOR A B S 1 Two ways of getting S = 1

34 Circuit for XOR Accumulating our results: Binary addition is the result of XOR plus AND

35 Half Adder Called a half adder because we haven’t allowed for any carry bit on input. In elementary addition of numbers, we always need to allow for a carry from one column to the next. 18 25 3 (plus a carry) 4

36 Half Adder

37 Full Adder INPUTS OUTPUTS A B CIN COUT S 1

38 Full Adder Circuit

39 Chaining the Full Adder
Possible to use the same scheme for subtraction by noting that A – B = A + (-B)

40 Binary Counting Use 1 for ON Use 0 for OFF = So our example has = = 43

41 Counting in Binary 1 11 1011 21 10101 2 10 12 1100 22 10110 3 13 1101 23 10111 4 100 14 1110 24 11000 5 101 15 1111 25 11001 6 110 16 10000 26 11010 7 111 17 10001 27 11011 8 1000 18 10010 28 11100 9 1001 19 10011 29 11101 1010 20 10100 30 11110

42 NAND (NOT AND) A B Q 1

43 NOR (NOT OR) A B Q 1

44 DeMorgan’s Theorem A NAND gate is equivalent to an inversion followed by an OR A NOR gate is equivalent to an inversion followed by and AND

45 DeMorgan Truth Table A B 1 NAND NOR

46 Exclusive NOR A B Q 1 Equality Detector

47 Summary for all 2-input gates
Inputs Output of each gate  A   B  AND NAND  OR  NOR XOR XNOR 1

48 Logic Gates and Symbols
NAND

49 More Gates and Symbols OR NOR NOT

50 And More XOR NXOR

51 Multi-input Gates

52 Three input OR

53 Logic Gate ICs

54 Example 7400

55 More ICs

56 And More


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