1. Part III The Arithmetic/Logic Unit
July 2005
Computer Architecture, The Arithmetic/Logic Unit

2. III The Arithmetic/Logic Unit
Overview of computer arithmetic and ALU design:
Review representation methods for signed integers
Discuss algorithms & hardware for arithmetic ops
Consider floating-point representation & arithmetic
Topics in This Part
Chapter Number Representation
Chapter 10 Adders and Simple ALUs
Chapter 11 Multipliers and Dividers
Chapter 12 Floating-Point Arithmetic
July 2005
Computer Architecture, The Arithmetic/Logic Unit

3. 11 Multipliers and Dividers
Modern processors perform many multiplications & divisions:
Encryption, image compression, graphic rendering
Hardware, vs programmed shift-add/sub, algorithms
Topics in This Chapter
Shift-Add Multiplication
Hardware Multipliers
Programmed Multiplication
Shift-Subtract Division
Hardware Dividers
Programmed Division
July 2005
Computer Architecture, The Arithmetic/Logic Unit

4. A Simple Multiplication Algorithm
Given two k-bit binary numbers to multiply:
Multiplicand: x = (xk−1xk−2…x1x0)
Multiplier: y = (yk−1yk−2…y1y0)
Distribute x over y = 2k−1yk−1 + … + 20y0, to find:
The product is z = x(2k−1yk−1) + … + x(20y0)
Thus, a simple algorithm to compute z is:
z := 0 // initialize product to 0 for i := 0 to k−1 // at each of k positions, if (yi) z += x·2i // add term into product
11/29/2018
Michael Frank, FAMU-FSU College of Engineering

5. Example C code for multiplication
C language function to multiply two 16-bit unsigned integers:
/* Function: mult16
Arguments: mand - 16-bit unsigned multiplicand, in low 16 bits of 32-bit word (upper 16 bits are all 0)
mer - 16-bit unsigned multiplier, in low 16 bits of 32-bit word (upper 16 bits are all 0) */
unsigned mult16(unsigned mand, unsigned mer){
unsigned i, prod = 0; // initialize vars;
for (i=0; i<16; i++) // at each position,
if (mer&(1<<i)) // if bit is a 1,
prod += mand<<i; // add mand*(2^i);
return prod;} // return result
11/29/2018
Michael Frank, FAMU-FSU College of Engineering

6. Michael Frank, FAMU-FSU College of Engineering
MIPS Assembly Example
$a0 = m(ultiplic)and
$a1 = m(ultipli)er
$v0 = prod(uct) $t0 = i(ndex)
$t1 = i(ndex)lim(it) $t2 = bit (in m’er) $t3 = term (of product)
Subroutine to multiply 16-bit unsigned integers:
mult16: li $v0,0 # prod = 0;
li $t0,0 # i = 0;
li $t1,16 # ilim = 16;
while: beq $t0,$t1,ret # while (i != ilim) {
li $t2,1 # bit = 1;
sllv $t2,$t2,$t0 # bit <<= i;
and $t2,$t2,$a1 # bit &= mer;
beq $t2,$0,endif # if (bit) {
sllv $t3,$a0,$t0 # term = mand<<i;
add $v0,$v0,$a0 # prod += term; }
endif: addi $t0,$t0,1 # i++;
b while # }
ret: jr $ra # return prod;
11/29/2018
Michael Frank, FAMU-FSU College of Engineering

7. 11.1 Shift-Add Multiplication
Figure Multiplication of 4-bit numbers in dot notation.
z(j+1) = (z(j) + yj x 2k) 2–1 with z(0) = 0 and z(k) = z
|––– add –––|
|–– shift right ––|
July 2005
Computer Architecture, The Arithmetic/Logic Unit

8. Binary and Decimal Multiplication
Example 11.1
Position Position
========================= =========================
x x
y y
z (0) z (0)
+y0x y0x
–––––––––––––––––––––––––– ––––––––––––––––––––––––––
2z (1) z (1)
z (1) z (1)
+y1x y1x
2z (2) z (2)
z (2) z (2)
+y2x y2x
2z (3) z (3)
z (3) z (3)
+y3x y3x
2z (4) z (4)
z (4) z (4)
Figure Step-by-step multiplication examples for 4-digit unsigned numbers.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

9. Two’s Complement Multiplication
For a 2’s complement number y = (yk−1…y0),
y = −2k−1yk−1 + 2k−2yk−2 + … + 21y1 + 20y0.
So, an algorithm to find product z = xy is:
z := 0 // initialize z for i := 0 to k−2 // for lowest k−1 terms, if (yi) z += x·2i; // accumulate product if (bk−1) z −= x·2k−1 // subtract for last term
11/29/2018
Michael Frank, FAMU-FSU College of Engineering

10. Two’s-Complement Multiplication
Example 11.2
Position Position
========================= =========================
x x
y y
z (0) z (0)
+y0x y0x
–––––––––––––––––––––––––– ––––––––––––––––––––––––––
2z (1) z (1)
z (1) z (1)
+y1x y1x
2z (2) z (2)
z (2) z (2)
+y2x y2x
2z (3) z (3)
z (3) z (3)
+(–y3x24) (–y3x24)
2z (4) z (4)
z (4) z (4)
Figure Step-by-step multiplication examples for 2’s-complement numbers.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

11. Computer Architecture, The Arithmetic/Logic Unit
11.2 Hardware Multipliers
Figure Hardware multiplier based on the shift-add algorithm.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

12. The Shift Part of Shift-Add
Figure Shifting incorporated in the connections to the partial product register rather than as a separate phase.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

13. High-Radix Multipliers
Radix-4 multiplication in dot notation.
z(j+1) = (z(j) + yj x 2k) 4–1 with z(0) = 0 and z(k/2) = z
|––– add –––|
|–– shift right ––|
Assume k even
July 2005
Computer Architecture, The Arithmetic/Logic Unit

14. Computer Architecture, The Arithmetic/Logic Unit
Tree Multipliers
Figure Schematic diagram for full/partial-tree multipliers.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

15. Computer Architecture, The Arithmetic/Logic Unit
Array Multipliers
Figure Array multiplier for 4-bit unsigned operands.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

16. 11.3 Programmed Multiplication
MiniMIPS instructions related to multiplication
mult $s0,$s1 # set Hi,Lo to ($s0)($s1); signed
multu $s2,$s3 # set Hi,Lo to ($s2)($s3); unsigned
mfhi $t0 # set $t0 to (Hi)
mflo $t1 # set $t1 to (Lo)
Example 11.3
Finding the 32-bit product of 32-bit integers in MiniMIPS
Multiply; result will be obtained in Hi,Lo
For unsigned multiplication:
Hi should be all-0s and Lo holds the 32-bit result
For signed multiplication:
Hi should be all-0s or all-1s, depending on the sign bit of Lo
July 2005
Computer Architecture, The Arithmetic/Logic Unit

17. Multiplication When There Is No Multiply Instruction
Example 11.4 (MiniMIPS shift-add program for multiplication)
Figure Register usage for programmed multiplication superimposed on the block diagram for a hardware multiplier.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

18. MIPS Assembly Code for this Multiplication Algorithm
shamu: move $v0,$zero # Initialize Hi to 0
move $v1,$zero # Initialize Lo to 0
addi $t2,$zero,32 # Initialize repetition counter to 32.
mloop: move $t0,$zero # Loop: Initialize carry to 0.
andi $t1,$a1,1 # LSB of multiplier to shift out.
srl $a1,$a1,1 # Shift the multiplier right.
beqz $t1,no_add # If bit shifted out was not 0, then
addu $v0,$v0,$a0 # add multiplicand into Hi word,
sltu $t0,$v0,$a0 # and remember the carry out.
no_add: andi $t1,$v0,1 # LSB of Hi word to shift out.
srl $v0,$v0,1 # Shift Hi word of product right.
sll $t0,$t0,31 # Shift carry bit left to position 31.
or $v0,$t0,$v0 # OR the carry into the Hi word.
srl $v1,$v1,1 # Shift Lo word of product right.
sll $t1,$t1,31 # Shift bit left to position 31.
or $v1,$t1,$v1 # OR the bit into the Lo word.
addi $t2,$t2,-1 # Decrement loop counter.
bnez $t2,mloop # Continue while counter is nonzero.
jr $ra # Return product=($v0,$v1) to caller.
Shift Hi
Shift Lo
Michael Frank, FAMU-FSU College of Engineering

19. Michael Frank, FAMU-FSU College of Engineering
C language equivalent
unsigned long shamu(unsigned int mcand, unsigned int mer) {
unsigned int Hi,Lo,carry,bit,counter;
Lo = Hi = 0; /* Initialize product registers to */
counter = 32; /* Initialize repetition counter to */
do { /* Repeat the following loop: */
carry = 0; /* Initialize carry-out bit to */
bit = mer & 1; /* t1 := LSB of m'er */
mer >>= 1; /* Shift m'er right by */
if (bit) { /* If low bit of multiplier was 1, then */
Hi += mcand; /* Add mcand into Hi */
carry = (Hi < mcand); /* Carry out from add */
} /* END IF */
bit = Hi & 1; /* LSB of Hi */
Hi = (carry << 31) | (Hi >> 1); /* Shift carry into Hi */
Lo = (bit << 31) | (Lo >> 1); /* Shift into Lo */
counter--; /* Decrement counter */
} while (counter > 0);
return ((unsigned long)Hi)<<32 & Lo; /* Return 64-bit result */
} /* END FUNCTION shamu() */
Michael Frank, FAMU-FSU College of Engineering

20. 11.4 Shift-Subtract Division
Figure Division of an 8-bit number by a 4-bit number in dot notation.
z(j) = 2z(j-1) - yk-j x 2k with z(0) = z and z(k) = 2k s
| shift |
|–– subtract ––|
July 2005
Computer Architecture, The Arithmetic/Logic Unit

21. Integer and Fractional Unsigned Division
Example 11.5
Position Position –1 –2 –3 –4 –5 –6 –7 –8
========================= ==========================
z z
x x
z (0) z (0)
2z (0) z (0)
–y3x y3=1 –y–1x y–1=3
–––––––––––––––––––––––––– –––––––––––––––––––––––––––
z (1) z (1)
2z (1) z (1)
–y2x y2=0 –y–2x y–2=5
z (2) z (2)
2z (2) z (2)
–y1x y1=1 –y–3x y–3=2
z (3) z (3)
2z (3) z (3)
–y0x y0=1 –y–4x y–4=8
z (4) z (4)
s s
y y
Figure Division examples for binary integers and decimal fractions.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

22. Division with Same-Width Operands
Example 11.6
Position Position –1 –2 –3 –4 –5 –6 –7 –8
========================= ==========================
z z
x x
z (0) z (0)
2z (0) z (0)
–y3x y3=0 –y–1x y–1=0
–––––––––––––––––––––––––– –––––––––––––––––––––––––––
z (1) z (1)
2z (1) z (1)
–y2x y2=0 –y–2x y–2=1
z (2) z (2)
2z (2) z (2)
–y1x y1=1 –y–3x y–3=1
z (3) z (3)
2z (3) z (3)
–y0x y0=0 –y–4x y–4=0
z (4) z (4)
s s
y y
Figure Division examples for 4/4-digit binary integers and fractions.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

23. Computer Architecture, The Arithmetic/Logic Unit
Signed Division
Method 1 (indirect): strip operand signs, divide, set result signs
Dividend Divisor Quotient Remainder
z = 5 x =  y = s = 2
z = 5 x = –  y = –1 s = 2
z = –5 x =  y = –1 s = –2
z = –5 x = –  y = s = –2
Method 2 (direct 2’s complement): develop quotient with digits
–1 and 1, chosen based on signs, convert to digits 0 and 1
Restoring division: perform trial subtraction, choose 0 for q digit
if partial remainder negative
Nonrestoring division: if sign of partial remainder is correct,
then subtract (choose 1 for q digit) else add (choose –1)
July 2005
Computer Architecture, The Arithmetic/Logic Unit

24. Computer Architecture, The Arithmetic/Logic Unit
11.5 Hardware Dividers
Figure Hardware divider based on the shift-subtract algorithm.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

25. The Shift Part of Shift-Subtract
Figure Shifting incorporated in the connections to the partial remainder register rather than as a separate phase.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

26. Computer Architecture, The Arithmetic/Logic Unit
High-Radix Dividers
Radix-4 division in dot notation.
z(j) = 4z(j-1) - (yk-2j+1 yk-2j)two x 2k with z(0) = z and z(k/2) = 2ks
| shift |
|––––––– subtract –––––––|
Assume k even
July 2005
Computer Architecture, The Arithmetic/Logic Unit

27. Computer Architecture, The Arithmetic/Logic Unit
Array Dividers
Figure Array divider for 8/4-bit unsigned integers.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

28. Computer Architecture, The Arithmetic/Logic Unit
11.6 Programmed Division
MiniMIPS instructions related to division
div $s0,$s1 # Lo = quotient, Hi = remainder
divu $s2,$s3 # unsigned version of division
mfhi $t0 # set $t0 to (Hi)
mflo $t1 # set $t1 to (Lo)
Example 11.7
Compute z mod x, where z (singed) and x > 0 are integers
Divide; remainder will be obtained in Hi
if remainder is negative,
then add |x| to (Hi) to obtain z mod x
else Hi holds z mod x
July 2005
Computer Architecture, The Arithmetic/Logic Unit

29. Division via Repeated Subtractions
Example 11.8 (MiniMIPS shift-add program for division)
Figure Register usage for programmed division superimposed on the block diagram for a hardware divider.
July 2005
Computer Architecture, The Arithmetic/Logic Unit

30. C++ function for division of unsigned 32-bit integers
unsigned int myDivide // DEFINE FUNCTION myDivide():
(unsigned int dividend, // Argument 0: Number to be divided.
unsigned int divisor, // Argument 1: Number to divide it by.
unsigned int &remainder) // Argument 2: Place to put remainder.
{unsigned int quotient = 0; // Quotient: Initially zero.
int position = 0; // Bit position: Initially zero.
while (!(divisor & (1<<31))) {// While divisor MSB is empty,
position++; // Increment bit position,
divisor <<= 1; } // & shift divisor left.
do{quotient <<= 1; // Repeatedly, make room for quotient bit;
if (dividend >= divisor) { // if we can do a subtraction here,
dividend -= divisor; // then do it,
quotient |= 1; } // and set quotient bit to 1;
divisor >>= 1; } // shift divisor right to a new position;
while (--position >= 0); // decrement pos and continue while >=0
remainder = dividend; // Remainder is the remaining dividend.
return quotient;} // Return quotient (& remainder).
Michael Frank, FAMU-FSU College of Engineering

31. Equivalent MIPS assembly for 32-bit unsigned division
myDivide: move $v0, $zero # quotient := 0;
move $t0, $zero # position := 0;
leftShift: and $t1, $a1, 0x # while (divisor & 0x
bne $t1, $zero, doTop # != 0) {
addi $t0, $t0, # position++;
sll $a1, $a1, # divisor <<= 1;
b leftShift # }
doTop: sll $v0, $v0, # do { quotient <<= 1;
sltu $t1, $a0, $a1 # $t4 := (dividend < divisor)
bne $t1, $zero, endIf # if ($t4 == 0) {// d’dend >= d’sor
subu $a0, $a0, $a1 # dividend -= divisor;
or $v0, $v0, # quotient |= 1; }
endIf: srl $a1, $a1, # divisor >>= 1;
addi $t0, $t0, # position--;
bgez $t0, doTop # } while (position >= 0);
endFor: sw $a0, 0($a2) # rem := remainder;
jr $ra # return.
Michael Frank, FAMU-FSU College of Engineering

32. Divider vs Multiplier: Hardware Similarities
Figure 11.12
Figure 11.4
Turn upside-down
Figure 11.14
Figure 11.7
July 2005
Computer Architecture, The Arithmetic/Logic Unit