1. doc.: IEEE 802.15-<doc#>
<month year>
doc.: IEEE <doc#>
January 2009
Project: IEEE P Working Group for Wireless Personal Area Networks (WPANs)
Submission Title: Motorola Preliminary Proposal to TG6
Date Submitted: 20 January, 2009
Source: Frederick Martin, Paul Gorday, Ed Callaway, Monique Brown, Motorola, Inc.
Address: 8000 W. Sunrise Blvd., Plantation, FL, 33322, USA
Voice: , FAX: ,
Re: TG6 Call For Proposals, IEEE P , 3 December 2008.
Abstract: Key requirements of the BAN standards effort, including power, cost and throughput scalability, can be addressed using a scalable direct sequence waveform. In addition, this approach facilitates novel ultra-low cost receiver implementations.
Purpose: This document is intended as a preliminary proposal for addressing the requirements of the TG6 standard.
Notice: This document has been prepared to assist the IEEE P It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein.
Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P
Martin, Motorola
<author>, <company>

2. Cost: lower than devices for existing standards
January 2009
Key BAN Requirements
Cost: lower than devices for existing standards
(e.g., , , Bluetooth® standards)
Power: sufficiently low to facilitate multi-year life from small primary cells
Throughput: scalable < 10 kbit/s to > 10 Mbit/s
Form factor: flat, wearable
Martin, Motorola

3. Fundamental Issue: Scalability
January 2009
Fundamental Issue: Scalability
Standard must meet many applications with a single solution
Must span 10 kbit/s to 10 Mbit/s
Must scale power with throughput
(Low bit rate solutions must be competitive with low throughput point solutions)
Must be size and cost competitive with non-scalable solutions
How to compete with non-scalable solutions?
Martin, Motorola

4. direct sequence (chip) waveform
January 2009
Proposal
direct sequence (chip) waveform
-- similar in structure to
-- chip rate scaled for higher throughput
Could scale up to 16 Mbit/s, using 2400 MHz band and 22 MHz channels
Multiple methods for scaling down to 10 kbit/s or below
Potential for PHY layer compatibility with 15.4
Enables unique ultra-low-cost receiver implementations
Martin, Motorola

5. January 2009
PHY Scalability
IEEE uses a fixed DSSS approach at 2.4 GHz
… add scalability using chip rate and coding options:
Data Rate (Mbit/s)
Chip Rate
(Mchip/s)
BW (20 dB)
(MHz)
Chips/
Symbol
Bits/Symbol 16
20.8 1 8
10.4 2 32 4
0.5
5.2
0.25
2.6
0.125*
1.3
* Lower data rates are more optimally achieved with duty cycle.
Martin, Motorola

6. Crystal-less Operation
January 2009
Crystal-less Operation
IEEE uses O-QPSK with half-sine pulse shape
Similar to minimum shift keying (MSK)
FM or differential phase detection methods can be used
Tolerant of frequency offsets and phase noise
Modest (~ 4 dB) penalty in Eb/No compared to matched filter detection
Frequency stability requirements scale with chip rate
Enables use of alternative (crystal-less) frequency references
Chip Rate
(Mchip/s)
Stability
2.4 GHz)
Device-to-Device Max. Freq. Error 1 20 40 2 80 4
160 8
320 16
640
IEEE
Martin, Motorola

7. Example: Differential Detection of 802.15.4
January 2009
Example: Differential Detection of
Simulation Results for
Matched filter detection is
better when frequency
error is small.
Differential detection
significantly extends
frequency error tolerance.
Differential
Detection
Matched Filter
Detection
Martin, Motorola

8. Start-of-Frame Delimiter
January 2009
Sync Burst Protocol
Sync burst: Optional extended PHY preamble used to assist synchronization of crystal-less nodes
Similar to the IEEE WRAN beacon protocol
Comprised of Sync Header, PHY Header, small data field
Just enough data (~ 2 bytes) to indicate time/frequency relative to sender
Sync#2
Sync#1
Sync#0
1920 ppm
1280 ppm
640 ppm fc
PSDU
-640 ppm
-1280 ppm
-1920 ppm
For a 16 Mchip/s device
Demodulator tolerates
640 ppm frequency error.
Three sync bursts extend
error tolerance to 1920 ppm.
Sync Burst
Time/
Frequency Data
Symbol
Sync
Start-of-Frame Delimiter
PHY
Header
Martin, Motorola

9. Crystal-less operation -- advantages
January 2009
Crystal-less operation -- advantages
-- Cost: Crystal cost is on order of 25% of total cost of single chip 15.4 node.
-- Form Factor: The crystal is tallest component in the short range transceiver BOM. Reducing the height of a crystal costs $$$.
-- Reliability: The crystal is the most fragile element in the short range transceiver BOM.
-- Integration: Fewer parts = simpler manufacturing = lower cost
Martin, Motorola

10. Scalable direct sequence waveform
January 2009
Summary
Scalable direct sequence waveform
Meets requirements of BAN
Opportunity for crystal-less operation
Further frequency error tolerance possible with sync burst protocol
This is a PHY-layer partial proposal. We welcome collaboration with other proposers.
Martin, Motorola