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Overloading More bit Date: 2006-05-15 Authors: May 2006 Month Year
doc.: IEEE yy/xxxxr0 May 2006 Overloading More bit Date: Authors: Notice: This document has been prepared to assist IEEE It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor grants a free, irrevocable license to the IEEE to incorporate material contained in this contribution, and any modifications thereof, in the creation of an IEEE Standards publication; to copyright in the IEEE’s name any IEEE Standards publication even though it may include portions of this contribution; and at the IEEE’s sole discretion to permit others to reproduce in whole or in part the resulting IEEE Standards publication. The contributor also acknowledges and accepts that this contribution may be made public by IEEE Patent Policy and Procedures: The contributor is familiar with the IEEE 802 Patent Policy and Procedures < ieee802.org/guides/bylaws/sb-bylaws.pdf>, including the statement "IEEE standards may include the known use of patent(s), including patent applications, provided the IEEE receives assurance from the patent holder or applicant with respect to patents essential for compliance with both mandatory and optional portions of the standard." Early disclosure to the Working Group of patent information that might be relevant to the standard is essential to reduce the possibility for delays in the development process and increase the likelihood that the draft publication will be approved for publication. Please notify the Chair as early as possible, in written or electronic form, if patented technology (or technology under patent application) might be incorporated into a draft standard being developed within the IEEE Working Group. If you have questions, contact the IEEE Patent Committee Administrator at Kumar John Doe, Some Company
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More bit in base std Original Intent Implementation
Month Year doc.: IEEE yy/xxxxr0 May 2006 More bit in base std Original Intent to assist PS clients to manage their wake-up time efficiently without causing significant delay in data packet delivery Implementation Generally implemented in firmware; look at a (hardware) queue 6-12 packets deep to see if there are any “more” packets for the STA in question Kumar John Doe, Some Company
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Month Year doc.: IEEE yy/xxxxr0 May 2006 Overload More bit in 11r Intends to reduce packet loss during Fast BSS by flipping the more bit to 1 as an indication to the STA that it might not be a good time to transition over since the current AP has “more” packets for it. The claim is that its important for TCP traffic because a single packet loss at layer 3 will shrink the TCP window and hence reduce throughput momentarily. Thus, in effect, the feature aims at avoiding “throughput bumps” during a Fast BSS r Kumar John Doe, Some Company
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When does this come into play?
Month Year doc.: IEEE yy/xxxxr0 May 2006 When does this come into play? Within the Fast BSS time-frame ~50ms period The scheme may work if all conditions are met: there is a constant flow of packets for a STA ( meaning there is hardly any jitter in the DS ) the AP can look deep enough to really predict that packets are impending for the STA the STA is not moving fast enough that it can afford to stick around with the old AP until the more-bit gets flipped to 0. Kumar John Doe, Some Company
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Month Year doc.: IEEE yy/xxxxr0 May 2006 Does this really help ? Whenever this scheme works, it may be helpful for TCP applications like FTP and HTTP; does not help in isochronous traffic such as VoIP. For a constant TCP stream for say FTP, you are going to loose packets anyway when you transition, because the more bit will always be 1 ! For HTTP ( bursty traffic ), it helps only if your burst coincides with your FBT ! Kumar John Doe, Some Company
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Month Year doc.: IEEE yy/xxxxr0 May 2006 Is it implementable? Since the scheme aims at increasing throughput by looking at packets coming from the DS, it needs to look far enough into various network elements in the DS to know when to flip the bit to 1 and when to flip it back to 0 ? How deep should you look ? It is not efficient to look beyond ? Implementation is limited by what can be done at the firmware level. We are better off designing efficient layer 3 cut-over mechanisms in the DS (out of TGr scope ). Why have something in standard that is not implementable ! Kumar John Doe, Some Company
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Month Year doc.: IEEE yy/xxxxr0 May 2006 Motion Instruct the editor to accept proposed resolution from the commenter for comment #208 and #1431, as documented in r-d2-comments.xls By: Second : Result: Yes - ; No - ; Abstain - Kumar John Doe, Some Company
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