Presentation is loading. Please wait.

Presentation is loading. Please wait.

J.-B. Seo, S. Srirangarajan, S.-D. Roy, and S. Janardhanan

Similar presentations


Presentation on theme: "J.-B. Seo, S. Srirangarajan, S.-D. Roy, and S. Janardhanan"— Presentation transcript:

1 J.-B. Seo, S. Srirangarajan, S.-D. Roy, and S. Janardhanan
Course Instructors: J.-B. Seo, S. Srirangarajan, S.-D. Roy, and S. Janardhanan Department of Electrical Engineering, IITD

2 Diode: Clamping circuit
During negative half-cycle, Diode is ‘ON’ The capacitor charges up to During positive half-cycle, Diode is ‘OFF’

3 Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to

4 Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to

5 Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to

6 Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to

7 Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to

8 Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to

9 Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to

10 Diode: Clamping circuit
During negative half-cycle, Diode is ‘ON’ The capacitor charges up to During positive half-cycle, Diode is ‘OFF’

11 Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018

12 Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018

13 Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018

14 Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018

15 Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018

16 Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018

17 Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Infeasible system Thursday, November 29, 2018

18 Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018

19 Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018

20 Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018

21 Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018

22 Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018

23 Diode: Clamping circuit
If , Diode is ‘ON’ The capacitor charges up to If , Diode is ‘OFF’

24 Diode: Clamping circuit
If , Diode is ‘ON’ The capacitor charges up to If , Diode is ‘OFF’

25 Diode: Clamping circuit
If , Diode is ‘ON’ Capacitor discharging, depending on RC The capacitor charges up to If , Diode is ‘OFF’

26 Diode: Clamping circuit

27 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase

28 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase

29 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase

30 Transistor: transfer resistor
+ Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase

31 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase

32 Transistor: transfer resistor
+ Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase Circuit symbol:

33 Transistor: transfer resistor
+

34 Transistor: transfer resistor
+

35

36 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

37 BJT- Basic Working Forward bias of EB Jcn. causes electrons to diffuse from emitter into base. As base region is very thin, the majority of electrons diffuse to the edge of the deple-tion region of CB Jcn., and then are swept to the collector by the electric field of the reverse-biased CB Jn. Small fraction of the electrons recombine with holes in base region. Holes are also injected from base to emitter region. (4) << (1). The two-carrier flow from [(1) and (4)] forms the emitter current (IE)

38 BJT- Basic Working Forward bias of EB Jcn. causes electrons to diffuse from emitter into base. As base region is very thin, the majority of electrons diffuse to the edge of the deple-tion region of CB Jcn., and then are swept to the collector by the electric field of the reverse-biased CB Jn. Small fraction of the electrons recombine with holes in base region. Holes are also injected from base to emitter region. (4) << (1). The two-carrier flow from [(1) and (4)] forms the emitter current (IE)

39 BJT- Basic Working Forward bias of EB Jcn. causes electrons to diffuse from emitter into base. As base region is very thin, the majority of electrons diffuse to the edge of the deple-tion region of CB Jcn., and then are swept to the collector by the electric field of the reverse-biased CB Jn. Small fraction of the electrons recombine with holes in base region. Holes are also injected from base to emitter region. (4) << (1). The two-carrier flow from [(1) and (4)] forms the emitter current (IE)

40 BJT- Basic Working ① ② ③ ④
Forward bias of EB Jcn. causes electrons to diffuse from emitter into base. As base region is very thin, the majority of electrons diffuse to the edge of the deple-tion region of CB Jcn., and then are swept to the collector by the electric field of the reverse-biased CB Jn. Small fraction of the electrons recombine with holes in base region. Holes are also injected from base to emitter region. (4) << (1). The two-carrier flow from [(1) and (4)] forms the emitter current (IE)

41 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + current gain !

42 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + current gain !

43 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + current gain !

44 Transistor: transfer resistor
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + current gain !

45 Both forward biased + + + + + + — + + + + + + + + + + + + — + + + + +
Saturation:

46 Transistor: transfer resistor
+ + + + + + + + + + + + +

47 BJT operation mode

48 BJT operation mode

49 BJT operation mode

50 BJT operation mode

51 BJT operation mode

52 BJT operation mode

53 BJT operation mode Forward active cutoff Saturation

54 BJT operation mode Forward active cutoff Saturation

55 Summary of BJT operation modes
npn BJT pnp BJT Forward active region (mode)

56 Summary of BJT operation modes
npn BJT pnp BJT Saturation region (mode)

57 Summary of BJT operation modes
npn BJT pnp BJT Cutoff region (mode)

58 Why back-to-back diode model can’t be used?
+ +

59 Why back-to-back diode model can’t be used?
+ +

60 Why back-to-back diode model can’t be used?
+ +

61 Why back-to-back diode model can’t be used?
+ + +

62 Why back-to-back diode model can’t be used?
+ + + +

63 Example – 1 Less than turn-on voltage  The input is high voltage

64 Example – 1  The input is low voltage  The input is high voltage
Less than turn-on voltage  The input is high voltage

65 Example – 1  The input is low voltage  The input is high voltage
Less than turn-on voltage  The input is high voltage

66 Example – 1  The input is low voltage  The input is high voltage
Less than turn-on voltage  The input is high voltage

67 Example – 1  The input is low voltage  The input is high voltage
Less than turn-on voltage  The input is high voltage

68 Example – 1  The input is low voltage  The input is high voltage
Less than turn-on voltage  The input is high voltage

69 Example – 1  The input is low voltage  The input is high voltage
Less than turn-on voltage  The input is high voltage

70 Example – 1  The input is high voltage: Cutoff 0.5 1 5 Saturation

71 Example – 2

72 Example – 2

73 Example – 2

74 Example – 2

75 Example – 2

76 Example – 3

77 Example – 3

78 Example – 3

79 Example – 3 Not forward active region

80 Example – 3 Not forward active region

81 Example – 3 Not forward active region

82 Example – 3 Not forward active region

83 Example – 3

84 Example – 3 NOR gate

85 BJT as an amplifier Let the transistor work in forward-active region

86 BJT as an amplifier Let the transistor work in forward-active region

87 BJT as an amplifier Let the transistor work in forward-active region

88 BJT as an amplifier Let the transistor work in forward-active region
AC input signal should not affect the transistor (DC) biasing!

89 BJT as an amplifier Stable biasing

90 Voltage divider biasing circuit
BJT as an amplifier: application Voltage divider biasing circuit Stage 1 amplifier Stage 2 amplifier Bypassing capacitor DC blocking capacitors

91 BJT Amplifier circuit Configuration Common-base, common-emitter, common-collector Determine which one is amplified, e.g., voltage, current, or both. DC Biasing circuit Construct a stable forward-active region (mode) Small-signal model Analyze BJT circuit with AC signal (small-amplitude, various frequencies)

92 BJT configuations: two-port network
Common base configuration Common emitter configuration Common collector configuration Characteristic Common Base Common Emitter Common Collector Input impedance Low Medium High Output impedance Very high Phase shift Voltage gain Current gain Power gain

93 BJT configuations: two-port network
Common base configuration Common emitter configuration Common collector configuration Characteristic Common Base Common Emitter Common Collector Input impedance Low Medium High Output impedance Very high Phase shift Voltage gain Current gain Power gain

94 BJT configuations: two-port network
Common base configuration Common emitter configuration Common collector configuration Characteristic Common Base Common Emitter Common Collector Input impedance Low Medium High Output impedance Very high Phase shift Voltage gain Current gain Power gain

95 BJT: Small-signal model
Input Output

96 Common base configuration (P.371)
Not good for current amplification But reasonable voltage gain Saturation

97 Common emitter configuration
Reasonable current AND voltage gain High power gain

98 Common emitter configuration: p.372

99 Example: p. 374 (Common-Emitter)

100 Example: p. 374 (Common-Emitter)

101 Example: p. 374

102 Example: p. 374

103 BJT biasing schemes Objective is to provide (stable) forward-active mode. Fixed current bias Collector-to-Base feedback resistor Self-Bias Current-mirror

104 BJT biasing: fixed current bias
Provide the desired dc base current from

105 BJT biasing: fixed current bias
Provide the desired dc base current from

106 BJT biasing: fixed current bias
Provide the desired dc base current from

107 BJT biasing: fixed current bias
Provide the desired dc base current from

108 BJT biasing: Collector-to-Base feedback resistor

109 BJT biasing: Collector-to-Base feedback resistor

110 BJT biasing: Collector-to-Base feedback resistor

111 BJT biasing: Collector-to-Base feedback resistor

112 BJT biasing: Self-bias
+

113 BJT biasing: Self-bias

114 BJT biasing: Self-bias

115 BJT biasing: Self-bias

116 BJT biasing: Self-bias
— ① — ② Combining ① and ②

117 BJT biasing: Self-bias
— ① — ② Combining ① and ②

118 BJT biasing: Self-bias
— ① — ② Combining ① and ②

119 BJT biasing: Current mirror

120 BJT: Small-signal model
Input Output

121 BJT: Small-signal model
Input Output

122 BJT: Small-signal model
Input Output

123 BJT: Small-signal model
Input Output

124 Example – 1 → This dc gain will be effective for ac gain

125 Example – 1 → This dc gain will be effective for ac gain

126 Example – 1 → This dc gain will be effective for ac gain

127 Example – 1

128 Example – 1

129 Example – 2

130 Example – 2 ; The transistor works at the forward active mode.

131 Example – 2 a circuit terminal connected to a constant dc source can always be considered as a signal ground in small-signal analysis : superposition theorem for linear operating point.

132 Example – 2

133 Example – 2

134 BJT: Two-port model How can we generalize the model for any configuration and any small-signal application? Linear two-port network Y Parameters Z Parameters h parameters g parameters h parameters

135 BJT: Two-port model How can we generalize the model for any configuration and any small-signal application? Linear two-port network Y Parameters Z Parameters h parameters g parameters h parameters

136 BJT: Two-port model How can we generalize the model for any configuration and any small-signal application? Linear two-port network Y Parameters Z Parameters h parameters g parameters h parameters

137 BJT: Two-port model

138 BJT: Two-port model (Data sheet provides this value)

139 BJT: Two-port model Y Y X X Z Z Z Resistance Ratio Admittance

140 Example – 1 By current division, we can get Resistance Ratio
Admittance By current division, we can get

141 Example – 1 By current division, we can get Resistance Ratio
Admittance By current division, we can get

142 Example – 1 Resistance Ratio Admittance The output voltage is

143 Example – 1 The output voltage is The input voltage should be
Resistance Ratio Admittance The output voltage is The input voltage should be

144 Example – 2

145 Example

146 Example - 2 Forward active region !

147 Example - 2 Forward active region !

148 Example - 2 Forward active region !

149 Example - 2 Forward active region !

150 Example - 2 Forward active region ! This part should be reverse-biased
to confirm the forward active region Forward active region !

151 BJT amplifier Let the transistor work in forward-active region

152 BJT: Configurations with small-signal model
Common-base configuration DC-biasing is omitted

153 Common emitter configuration: p.372

154 Common emitter configuration: p.372

155 Common emitter configuration: p.372


Download ppt "J.-B. Seo, S. Srirangarajan, S.-D. Roy, and S. Janardhanan"

Similar presentations


Ads by Google