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J.-B. Seo, S. Srirangarajan, S.-D. Roy, and S. Janardhanan
Course Instructors: J.-B. Seo, S. Srirangarajan, S.-D. Roy, and S. Janardhanan Department of Electrical Engineering, IITD
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Diode: Clamping circuit
During negative half-cycle, Diode is ‘ON’ The capacitor charges up to During positive half-cycle, Diode is ‘OFF’
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Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to
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Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to
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Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to
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Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to
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Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to
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Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to
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Diode: Clamping circuit
During positive half-cycle, Diode is ‘OFF’ The capacitor charges up to No charging. Instead, discharging occurs up to
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Diode: Clamping circuit
During negative half-cycle, Diode is ‘ON’ The capacitor charges up to During positive half-cycle, Diode is ‘OFF’
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Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018
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Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018
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Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018
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Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018
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Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018
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Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Thursday, November 29, 2018
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Example 1 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V. Determine Vo. Infeasible system Thursday, November 29, 2018
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Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018
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Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018
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Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018
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Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018
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Example 2 Consider the Si diode in the circuit. Let V1 = 5 V and V2 = 0 V and Vcc =6 V Determine Vo. Thursday, November 29, 2018
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Diode: Clamping circuit
If , Diode is ‘ON’ The capacitor charges up to If , Diode is ‘OFF’
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Diode: Clamping circuit
If , Diode is ‘ON’ The capacitor charges up to If , Diode is ‘OFF’
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Diode: Clamping circuit
If , Diode is ‘ON’ Capacitor discharging, depending on RC The capacitor charges up to If , Diode is ‘OFF’
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Diode: Clamping circuit
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Transistor: transfer resistor
+ + — + — + — + — + — — — — — + + + — + — + — + — + — + — + — + + + + + + + — + + + + + + + + + + + + + + + — + + + + + + + + + + + + + + + — + + + + + + + + — + + + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase
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Transistor: transfer resistor
+ + — + — + — + — + — — — — — + + + — + — + — + — + — + — + — + + + + + + + — + + + + + + + + + + + + + + + — + + + + + + + + + + + + + + + — + + + + + + + + — + + + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase
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Transistor: transfer resistor
+ + — + — + — + — + — — — — — + + + — + — + — + — + — + — + — + + + + + + + — + + + + + + + + + + + + + + + — + + + + + + + + + + + + + + + — + + + + + + + + — + + + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase
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Transistor: transfer resistor
— + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase
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Transistor: transfer resistor
+ + + + + + — — — — — — — — + + — + — + — + — + — + — + + + + + + — + + + + + + + + + + + + + — + + + + + + + + + + + + + — + + + + + + + — + Circuit symbol Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase
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Transistor: transfer resistor
— + Doping order Nemitter > Ncollector > Nbase Thickness order Tcollector >Temitter >Tbase Circuit symbol:
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Transistor: transfer resistor
— +
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Transistor: transfer resistor
— +
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Transistor: transfer resistor
+ + + + + + — — — + + — — + + — + + + + + + + + + — + + + + + + + + + + + + + — + + + + + + + — + + + + + + — + + + + + + + — + — — — — —
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BJT- Basic Working Forward bias of EB Jcn. causes electrons to diffuse from emitter into base. As base region is very thin, the majority of electrons diffuse to the edge of the deple-tion region of CB Jcn., and then are swept to the collector by the electric field of the reverse-biased CB Jn. Small fraction of the electrons recombine with holes in base region. Holes are also injected from base to emitter region. (4) << (1). The two-carrier flow from [(1) and (4)] forms the emitter current (IE) ①
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BJT- Basic Working Forward bias of EB Jcn. causes electrons to diffuse from emitter into base. As base region is very thin, the majority of electrons diffuse to the edge of the deple-tion region of CB Jcn., and then are swept to the collector by the electric field of the reverse-biased CB Jn. Small fraction of the electrons recombine with holes in base region. Holes are also injected from base to emitter region. (4) << (1). The two-carrier flow from [(1) and (4)] forms the emitter current (IE) ① ②
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BJT- Basic Working Forward bias of EB Jcn. causes electrons to diffuse from emitter into base. As base region is very thin, the majority of electrons diffuse to the edge of the deple-tion region of CB Jcn., and then are swept to the collector by the electric field of the reverse-biased CB Jn. Small fraction of the electrons recombine with holes in base region. Holes are also injected from base to emitter region. (4) << (1). The two-carrier flow from [(1) and (4)] forms the emitter current (IE) ① ② ③
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BJT- Basic Working ① ② ③ ④
Forward bias of EB Jcn. causes electrons to diffuse from emitter into base. As base region is very thin, the majority of electrons diffuse to the edge of the deple-tion region of CB Jcn., and then are swept to the collector by the electric field of the reverse-biased CB Jn. Small fraction of the electrons recombine with holes in base region. Holes are also injected from base to emitter region. (4) << (1). The two-carrier flow from [(1) and (4)] forms the emitter current (IE) ① ② ③ ④
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Transistor: transfer resistor
+ + + + — — — — — + — + — — + + — + — + — + — + — + — + + + + + + — + + + + + + + — + + + + + + — + + + + + + + — — + + + + + + — + + + + + + + — + — — current gain !
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Transistor: transfer resistor
+ + + + — — — — — + — + — — + + — + — + — + — + — + — + + + + + + — + + + + + + + — + + + + + + — + + + + + + + — — + + + + + + — + + + + + + + — + — — current gain !
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Transistor: transfer resistor
+ + + + — — — — — + — + — — + + — + — + — + — + — + — + + + + + + — + + + + + + + — + + + + + + — + + + + + + + — — + + + + + + — + + + + + + + — + — — current gain !
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Transistor: transfer resistor
+ + + + — — — — — + — + — — + + — + — + — + — + — + — + + + + + + — + + + + + + + — + + + + + + — + + + + + + + — — + + + + + + — + + + + + + + — + — — current gain !
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Both forward biased + + + + + + — + + + + + + + + + + + + — + + + + +
Saturation:
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Transistor: transfer resistor
— — — — — + + — — — — — + + — + — — — + + — — — — — — — — + + — — — — — + — — — + + — — — — — — +
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BJT operation mode
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BJT operation mode
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BJT operation mode
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BJT operation mode
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BJT operation mode
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BJT operation mode
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BJT operation mode Forward active cutoff Saturation
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BJT operation mode Forward active cutoff Saturation
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Summary of BJT operation modes
npn BJT pnp BJT Forward active region (mode)
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Summary of BJT operation modes
npn BJT pnp BJT Saturation region (mode)
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Summary of BJT operation modes
npn BJT pnp BJT Cutoff region (mode)
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Why back-to-back diode model can’t be used?
+ – + –
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Why back-to-back diode model can’t be used?
+ – + –
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Why back-to-back diode model can’t be used?
+ – + –
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Why back-to-back diode model can’t be used?
+ – + – + –
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Why back-to-back diode model can’t be used?
+ – + – + – + –
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Example – 1 Less than turn-on voltage The input is high voltage
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Example – 1 The input is low voltage The input is high voltage
Less than turn-on voltage The input is high voltage
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Example – 1 The input is low voltage The input is high voltage
Less than turn-on voltage The input is high voltage
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Example – 1 The input is low voltage The input is high voltage
Less than turn-on voltage The input is high voltage
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Example – 1 The input is low voltage The input is high voltage
Less than turn-on voltage The input is high voltage
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Example – 1 The input is low voltage The input is high voltage
Less than turn-on voltage The input is high voltage
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Example – 1 The input is low voltage The input is high voltage
Less than turn-on voltage The input is high voltage
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Example – 1 The input is high voltage: Cutoff 0.5 1 5 Saturation
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Example – 2
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Example – 2
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Example – 2
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Example – 2
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Example – 2
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Example – 3
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Example – 3
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Example – 3
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Example – 3 Not forward active region
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Example – 3 Not forward active region
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Example – 3 Not forward active region
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Example – 3 Not forward active region
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Example – 3
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Example – 3 NOR gate
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BJT as an amplifier Let the transistor work in forward-active region
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BJT as an amplifier Let the transistor work in forward-active region
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BJT as an amplifier Let the transistor work in forward-active region
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BJT as an amplifier Let the transistor work in forward-active region
AC input signal should not affect the transistor (DC) biasing!
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BJT as an amplifier Stable biasing
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Voltage divider biasing circuit
BJT as an amplifier: application Voltage divider biasing circuit Stage 1 amplifier Stage 2 amplifier Bypassing capacitor DC blocking capacitors
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BJT Amplifier circuit Configuration Common-base, common-emitter, common-collector Determine which one is amplified, e.g., voltage, current, or both. DC Biasing circuit Construct a stable forward-active region (mode) Small-signal model Analyze BJT circuit with AC signal (small-amplitude, various frequencies)
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BJT configuations: two-port network
Common base configuration Common emitter configuration Common collector configuration Characteristic Common Base Common Emitter Common Collector Input impedance Low Medium High Output impedance Very high Phase shift Voltage gain Current gain Power gain
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BJT configuations: two-port network
Common base configuration Common emitter configuration Common collector configuration Characteristic Common Base Common Emitter Common Collector Input impedance Low Medium High Output impedance Very high Phase shift Voltage gain Current gain Power gain
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BJT configuations: two-port network
Common base configuration Common emitter configuration Common collector configuration Characteristic Common Base Common Emitter Common Collector Input impedance Low Medium High Output impedance Very high Phase shift Voltage gain Current gain Power gain
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BJT: Small-signal model
Input Output
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Common base configuration (P.371)
Not good for current amplification But reasonable voltage gain Saturation
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Common emitter configuration
Reasonable current AND voltage gain High power gain
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Common emitter configuration: p.372
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Example: p. 374 (Common-Emitter)
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Example: p. 374 (Common-Emitter)
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Example: p. 374
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Example: p. 374
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BJT biasing schemes Objective is to provide (stable) forward-active mode. Fixed current bias Collector-to-Base feedback resistor Self-Bias Current-mirror
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BJT biasing: fixed current bias
Provide the desired dc base current from
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BJT biasing: fixed current bias
Provide the desired dc base current from
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BJT biasing: fixed current bias
Provide the desired dc base current from
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BJT biasing: fixed current bias
Provide the desired dc base current from
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BJT biasing: Collector-to-Base feedback resistor
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BJT biasing: Collector-to-Base feedback resistor
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BJT biasing: Collector-to-Base feedback resistor
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BJT biasing: Collector-to-Base feedback resistor
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BJT biasing: Self-bias
+ –
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BJT biasing: Self-bias
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BJT biasing: Self-bias
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BJT biasing: Self-bias
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BJT biasing: Self-bias
— ① — ② Combining ① and ②
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BJT biasing: Self-bias
— ① — ② Combining ① and ②
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BJT biasing: Self-bias
— ① — ② Combining ① and ②
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BJT biasing: Current mirror
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BJT: Small-signal model
Input Output
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BJT: Small-signal model
Input Output
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BJT: Small-signal model
Input Output
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BJT: Small-signal model
Input Output
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Example – 1 → This dc gain will be effective for ac gain
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Example – 1 → This dc gain will be effective for ac gain
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Example – 1 → This dc gain will be effective for ac gain
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Example – 1
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Example – 1
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Example – 2
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Example – 2 ; The transistor works at the forward active mode.
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Example – 2 a circuit terminal connected to a constant dc source can always be considered as a signal ground in small-signal analysis : superposition theorem for linear operating point.
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Example – 2
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Example – 2
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BJT: Two-port model How can we generalize the model for any configuration and any small-signal application? Linear two-port network Y Parameters Z Parameters h parameters g parameters h parameters
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BJT: Two-port model How can we generalize the model for any configuration and any small-signal application? Linear two-port network Y Parameters Z Parameters h parameters g parameters h parameters
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BJT: Two-port model How can we generalize the model for any configuration and any small-signal application? Linear two-port network Y Parameters Z Parameters h parameters g parameters h parameters
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BJT: Two-port model
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BJT: Two-port model (Data sheet provides this value)
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BJT: Two-port model Y Y X X Z Z Z Resistance Ratio Admittance
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Example – 1 By current division, we can get Resistance Ratio
Admittance By current division, we can get
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Example – 1 By current division, we can get Resistance Ratio
Admittance By current division, we can get
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Example – 1 Resistance Ratio Admittance The output voltage is
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Example – 1 The output voltage is The input voltage should be
Resistance Ratio Admittance The output voltage is The input voltage should be
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Example – 2
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Example
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Example - 2 Forward active region !
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Example - 2 Forward active region !
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Example - 2 Forward active region !
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Example - 2 Forward active region !
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Example - 2 Forward active region ! This part should be reverse-biased
to confirm the forward active region Forward active region !
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BJT amplifier Let the transistor work in forward-active region
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BJT: Configurations with small-signal model
Common-base configuration DC-biasing is omitted
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Common emitter configuration: p.372
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Common emitter configuration: p.372
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Common emitter configuration: p.372
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