1. Chapter 5 Bipolar Junction Transistors
Microelectronic Circuit Design
Richard C. Jaeger
Travis N. Blalock
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2. Microelectronic Circuit Design
Chapter Goals
Explore physical structure of bipolar transistor
Understand bipolar transistor action and importance of carrier transport across base region
Study terminal characteristics of BJT.
Explore differences between npn and pnp transistors.
Develop Transport and Ebers-Moll models for bipolar device.
Define four operation regions of BJT.
Explore model simplifications for each operation region.
Understand origin and modeling of Early effect.
Present SPICE model for bipolar transistor.Provide examples of worst-case and Monte Carlo analysis of bias circuits.
Discuss bipolar current sources and current mirror.
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3. Microelectronic Circuit Design
Physical Structure
Consists of 3 alternating layers of n- and p-type semiconductor called emitter (E), base (B) and collector (C).
Majority of current enters collector, crosses base region and exits through emitter. A small current also enters base terminal, crosses base-emitter junction and exits through emitter.
Carrier transport in the active base region directly beneath the heavily doped (n+) emitter dominates i-v characteristics of BJT.
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4. Transport Model for npn Transistor
Base-emitter voltage vBE and base-collector voltage vBC determine currents in transistor and are said to be positive when they forward-bias their respective pn junctions.
The terminal currents are collector current(iC ), base current (iB) and emitter current (iE).
Primary difference between BJT and FET is that iB is significant while iG = 0.
Narrow width of the base region causes coupling between the two back to back pn junctions.
Emitter injects electrons into base region, almost all of them travel across narrow base and are removed by collector
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5. npn Transistor: Forward Characteristics
Base current is given by
is forward common-emitter current gain
Emitter current is given by
Forward transport current is
IS is saturation current
is forward common- base current gain
In this forward active operation region,
VT = kT/q =0.025 V at room temperature
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6. npn Transistor: Reverse Characteristics
is reverse common-emitter current gain
Base currents in forward and reverse modes are different due to asymmetric doping levels in emitter and collector regions.
Emitter current is given by
Reverse transport current is
is reverse common-base current gain
Base current is given by
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7. npn Transistor: Complete Transport Model Equations for Any Bias
First term in both emitter and collector current expressions give current transported completely across base region.
Symmetry exists between base-emitter and base-collector voltages in establishing dominant current in bipolar transistor.
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8. Transport Model Calculations: Example
Evaluating the expressions for terminal currents,
Problem: Find terminal voltages and currents.
Given data: VBB = 0.75 V, VCC = 5.0 V, IS =10-16 A, bF =50, bR =1
Assumptions: Room temperature operation, VT =25.0 mV.
Analysis: VBE =0.75 V,
VBC = VBB- VCC =0.75 V-5.00V=-4.25 V
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9. pnp Transistor: Structure
Voltages vEB and vCB are positive when they forward bias their respective pn junctions.
Collector current and base current exit transistor terminals and emitter current enters the device.
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10. pnp Transistor: Forward Characteristics
Base current is given by
Emitter current is given by
Forward transport current is
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11. pnp Transistor: Reverse Characteristics
Base current is given by
Emitter current is given by
Reverse transport current is
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12. pnp Transistor: Complete Transport Model Equations for Any Bias
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13. Circuit Representation for Transport Models
In npn transistor (expressions analogous for pnp transistors), total current traversing base is modeled by current source given by:
Diode currents correspond directly to 2 components of base current.
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14. Microelectronic Circuit Design
Ebers-Moll Model
Forward characteristics (npn transistor)
where
Reverse characteristics (npn transistor)
where
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15. Ebers-Moll Model (contd.)
Complete Ebers-Moll equations (npn transistor) are given by combining forward and reverse characteristics:
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16. Ebers-Moll Model (contd.)
Complete Ebers-Moll equations (pnp transistor) are given by:
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17. Operation Regions of Bipolar Transistor
Base-emitter junction
Base-collector junction
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18. Microelectronic Circuit Design
i-v Characteristics of Bipolar Transistor: Common-Emitter Output Characteristics
For iB=0, transistor is cutoff. If iB >0, iC also increases.
For vCE > vBE, npn transistor is in forward active region, iC = bF iB is independent of and vCE.
For vCE< vBE, transistor is in saturation.
For vCE< 0, roles of collector and emitter reverse.
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19. Microelectronic Circuit Design
i-v Characteristics of Bipolar Transistor: Common-Base Output Characteristics
For vCB > 0, npn transistor is in forward active region, iC = iE is independent of and vCE.
For vCB< 0, base-collector diode becomes forward-biased and iC grows exponentially (in negative direction) as base-collector diode begins to conduct.
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20. Microelectronic Circuit Design
i-v Characteristics of Bipolar Transistor: Common-Emitter Transfer Characteristic
Defines relation between collector current and base-emitter voltage of transistor.
Almost identical to transfer characteristic of pn junction diode
Setting vBC =0 in the collector-current expression,
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21. Junction Breakdown Voltages
If reverse voltage across either of the two pn junctions in the transistor is too large, corresponding diode will break down.
Emitter is most heavily doped region and collector is most lightly doped region.
Due to doping differences, base-emitter diode has relatively low breakdown voltage (3 to 10 V). Collector-base diode can be designed to break down at much larger voltages.
Transistors must be selected in accordance with possible reverse voltages in circuit.
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22. Minority Carrier Transport in Base Region
BJT current dominated by diffusion of minority carriers (electrons in npn and holes in pnp transistors) across base region.
Base current consists of hole injection back into emitter and collector and small additional current to replenish holes lost to recombination with electrons in base.
Minority carrier concentrations at the 2 ends of base region are:
nbo is equilibrium electron density in p-type base region.
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23. Minority Carrier Transport in Base Region (contd.)
For narrow base, minority carrier density decreases linearly across base, diffusion current in base is:
NAB= doping concentration in base
ni2= intrinsic carrier concentration (1010/cm3)
nbo = ni2 / NAB
Saturation current for pnp transistor is
Due to higher mobility of electrons than holes, npn transistor conducts higher current than pnp for given set of applied voltages.
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24. Microelectronic Circuit Design
Base Transit Time
Forward transit time is the time constant associated with storing minority-carrier charge Q required to establish career gradient in base region.
Base transit time places upper limit on useful operating frequency of transistor.
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25. Diffusion Capacitance
For vBE and hence iC to change, charge stored in base region must also change.
Diffusion capacitance in parallel with forward-biased base-emitter diode models the change in charge with vBE.
Since transport current normally represents collector current in forward-active region,
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26. Simplified Cutoff Region Model
If we assume that
where -4kT/q = -0.1 V, then the transport model terminal current equations simplify to
In cutoff region both junctions are reverse-biased, transistor is said to be in off state
vBE <0, vBC <0
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27. Simplified Cutoff Region Model (Example)
Problem: Estimate terminal currents using simplified transport model
Given data: IS =10-16 A, aF = 0.95, aR = 0.25, VBE = 0 V, VBC = -5 V
Assumptions: Simplified transport model assumptions
Analysis: From given voltages, we know that transistor is in cutoff.
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28. Simplified Forward-Active Region Model
In forward-active region, emitter-base junction is forward-biased and collector-base junction is reverse-biased. vBE > 0, vBC < 0
If we assume that
then the transport model terminal current equations simplify to
BJT is often considered a current-controlled device, though fundamental forward active behavior suggests a voltage- controlled current source.
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29. Simplified Forward-Active Region Model (Example 1)
Problem: Estimate terminal currents and base-emitter voltage
Given data: IS =10-16 A, aF = 0.95, VBC =VB - VC= -5 V, IE =100 mA
Assumptions: Simplified transport model assumptions, room
temperature operation, VT = 25.0 mV
Analysis: Current source forward-biases base-emitter diode, VBE > 0,
VBC < 0, we know that transistor is in forward-active operation region.
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30. Simplified Forward-Active Region Model (Example 2)
Problem: Estimate terminal currents, base-emitter and base-collector
voltages.
Given data: IS =10-16 A, aF = 0.95, VC= +5 V, IB =100 mA
Assumptions: Simplified transport model assumptions, room
temperature operation, VT = 25.0 mV
Analysis: Current source causes base current to forward-bias base-emitter diode, VBE > 0, VBC <0, we know that transistor is in forward-active operation region.
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31. Simplified Circuit Model for Forward-Active Region
Current in base-emitter diode is amplified by common-emitter current gain bF and appears at collector,base and collector currents are exponentially related to base-emitter voltage.
Base-emitter diode is replaced by constant voltage drop model(VBE = 0.7 V) since it is forward-biased in forward-active region.
Dc base and emitter voltages differ by 0.7 V diode voltage drop in forward-active region.
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32. b-Cutoff Frequency, Transconductance and Transit Time
Forward-biased diffusion and reverse-biased pn junction capacitances of BJT cause current gain to be frequency-dependent.
Unity gain frequency is frequency at which current gain is unity
fb = fT / bF is b-cutoff frequency
Transconductance is defined by:
Transit time is given by:
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33. Simplified Forward-Active Region Model (Example 3)
Problem: Find Q-point
Given data: bF = 50, bR = 1 VBC =VB - VC= -9 V
Assumptions: Forward-active region of operation, VBE = 0.7 V
Analysis:
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34. Simplified Reverse-Active Region Model
In reverse-active region, base-collector diode is forward-biased and base-emitter diode is reverse-biased.
Simplified equations are:
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35. Simplified Reverse-Active Region Model
Problem: Find Q-point
Given data: bF = 50, bR = 1 VBE =VB - VE = -9 V. Combination of R and the voltage source forward biases base-collector junction.
Assumptions: Reverse-active region of operation, VBC = 0.7 V
Analysis:
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36. Simplified Saturation Region Model
In saturation region, both junctions are forward-biased and transistor operates with small voltage between collector and emitter. vCESAT is saturation voltage for npn BJT.
for
No simplified expressions exist for terminal currents other than iC + iB = iE.
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37. Early Effect and Early Voltage
As reverse-bias across collector-base junction increases, width of collector-base depletion layer increases and width of base decreases (base-width modulation).
In practical BJT, output characteristics have a positive slope in forward-active region, collector current in not independent of vCE.
Early effect: When output characteristics are extrapolated back to point of zero iC, curves intersect at common point vCE = -VA (Early voltage) which lies between 15 V and 150 V.
Simplified equations (including Early effect):
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38. Microelectronic Circuit Design
BJT SPICE Model
Besides capacitances associated with the physical structure, additional components are: diode current iS, capacitance CJS, related to the large area pn junction that isolates collector form substrate and one transistor form next.
RB is resistance between external base contact and intrinsic base region.
Collector current must pass through RC on its way to active region of collector-base junction.
RE models any extrinsic emitter resistance in device.
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39. BJT SPICE Model Typical Values
Saturation Current = 3 e-17 A
Forward current gain = 100
Reverse current gain = 0.5
Forward Early voltage = 75 V
Base resistance = 250 W
Collector Resistance = 50 W
Emitter Resistance = 1 W
Forward transit time = 0.15 ns
Reverse transit time = 15 ns
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40. Microelectronic Circuit Design
High Performane BJTs
Modern BJTs use combination of shallow and deep trench isolation processes to reduce device capacitances and transit times.
Have polysilicon emitters, narrow bases or SiGe base regions.
SiGe transistors exhibit cutoff frequencies > 100 GHz.
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41. Microelectronic Circuit Design
Biasing for BJT
Goal of biasing is to establish known Q-point which in turn establishes initial operating region of transistor.
In BJT, Q-point is represented by (IC, VCE) for npn transistor or (IC, VEC) for pnp transistor.
Q-point controls values of diffusion capacitance, transconductance, input and output resistances.
In general, during circuit analysis, we use simplified mathematical relationships derived for specified operation region and Early voltage is assumed to be infinite.
The practical biasing circuits used for BJT are:
Four-Resistor Bias network
Two-Resistor Bias network
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42. Four-Resistor Bias Network for BJT
Q-point is (250 mA, 4.17 V)
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43. Four-Resistor Bias Network for BJT (contd.)
All calculated currents > 0, VBC = VBE - VCE = = V
Hence, base-collector junction is reverse-biased, assumption of forward-active region operation is correct.
Load-line for the circuit is:
The two points needed to plot the load line are (0, 12 V) and (314 mA, 0).Resulting load line is plotted on common-emitter output characteristics.
IB= 2.7 mA, intersection of corresponding characteristic with load line gives Q-point.
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44. Four-Resistor Bias Network for BJT: Design Objectives
We know that
This implies that IB << I2. So that I1 = I2. So base current doesn’t disturb voltage divider action. Thus, Q-point is independent of base current as well as current gain.
Also, VEQ is designed to be large enough that small variations in VBE assumed value of won’t affect IE.
Current in base voltage divider network is limited by choosing
This ensures that power dissipation in bias resistors is < 17 % of total quiescent power consumed by circuit and I2 >> IB for b>50.
for
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45. Four-Resistor Bias Network for BJT: Design Guidelines
Choose Thevenin equivalent base voltage
Select R1 to set I1 = 9IB.
Select R2 to set I2 = 10IB.
RE is determined by VEQ and desired IC.
RC is determined by desired VCE.
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46. Four-Resistor Bias Network for BJT: Example
Problem: Design 4-resistor bias circuit with given parameters.
Given data: IC =750 mA, bF = 100, VCC = 15 V, VCE = 5 V
Assumptions: Forward-active operation region, VBE = 0.7 V
Analysis: Divide (VCC - VCE) equally between RE and RC.Thus, VE =5 V
and VC =10 V
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47. Two-Resistor Bias Network for BJT: Example
Problem: Find Q-point for pnp transistor in 2-resistor bias circuit with
given parameters.
Given data: bF = 50, VCC = 9 V
Assumptions: Forward-active operation region, VEB = 0.7 V
Analysis:
Q-point is : (6.01 mA, 2.88 V)
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48. Microelectronic Circuit Design
BJT Current Mirror
Collector terminal of a BJT in forward-active region mimics behavior of a current source.
Output current is independent of VCC as long as VCC > 0. Thus, BJT is in forward-active region, since VBC =- VCC.
Q1 and Q2 are assumed to be matched (with identical IS, bF, bR, VA,)
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49. BJT Current Mirror (contd.)
With infinite bFO and VA, mirror ratio is unity. Finite current gain and Early voltage introduce mismatch in output and reference current of mirror
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50. BJT Current Mirror: Example
Problem: Find output current for given current mirror
Given data: bFO = 75, VA = 50 V
Assumptions: Forward-active operation region, VBE = 0.7 V
Analysis:
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51. BJT Current Mirror: Altering Mirror Ratio
Mirror ratio of BJT current mirror can be changed by changing relative sizes of emitters in the transistors. For ideal case, mirror ratio is determined only by ratio of the two emitter areas.
where ISO is saturation current of BJT with one unit of emitter area: AE =1(A). Actual dimensions of A are technology-dependent.
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52. BJT Current Mirror: Output Resistance
Current source using BJT doesn’t have an output current that is completely independent of terminal voltage across it, due to finite early voltage. Current source seems to have resistive component with it.
Ro is the small signal output resistance of the current mirror.
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53. Tolerances-Worst-Case Analysis: Example
Problem: Find worst-case values of IC and VCE.
Given data: bFO = 75 with 50% tolerance, VA = 50 V, 5 % tolerance on VCC, 10% tolerance for each resistor.
Analysis:
To maximize IC , VEQ should be maximized, RE should be minimized and opposite for minimizing IC.
Extremes of RE are: 14.4 kW and kW.
To maximize VEQ, VCC and R1 should be maximized, R2 should be minimized and opposite for minimizing VEQ.
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54. Tolerances-Worst-Case Analysis: Example (contd.)
Extremes of VEQ are: 4.78 V and 3.31 V.
Using these values, extremes for IC are: 283 mA and 148 mA.
To maximize VCE, IC and RC should be minimized, and opposite for minimizing VEQ.
Extremes of VCE are: 7.06 V (forward-active region)
and V (saturated, hence calculated values for
VCE and IC actually not correct).
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55. Tolerances-Monte Carlo Analysis
In real circuits, it is unlikely that various components will reach their extremes at the same time, instead they will have some statistical distribution. Hence worst-case analysis overestimates extremes of circuit behavior.
Monte Carlo analysis, values of each circuit parameter are randomly selected from possible distributions of parameters and used to analyze the circuit.
Several random parameter sets are generated, the statistical behavior of circuit is built up from analysis of many test cases.
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56. Tolerances-Monte Carlo Analysis: Example
Full results of Monte Carlo analysis of 500 cases of the 4-resistor bias circuit yields mean values of 207 mA and 4.06 V for IC and VCE respectively which are close to values originally estimated from nominal circuit elements. Standard deviations are 19.6 mA and 0.64 V respectively.
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