1. Recap
D flip-flop based counter
Flip-flop transition table
Flip-flop input table
Karnaugh maps
Logical expressions for flip-flop inputs
Sequential circuit Implementation

2. Digital Logic & Design
Dr. Waseem Ikram
Lecture 33

3. Three possible state assignments for states a, b, c, d and f
000
001 b
010 c
011 d
100 f
110

4. Next State flip-flop input table for first State Assignment
Present State
Next State
D flip-flop Inputs
Output
X=0
X=1
000
100
001 1
010
011

5. X Q x D + = 1 2 + = Q X D Q2Q1/Q0X 00 01 11 10 1 x Q2Q1/Q0X 00 01 111 2 + = 1 2 + = Q X D
Q2Q1/Q0X 00 01 11 10 1 x
Q2Q1/Q0X 00 01 11 10 1 x

6. X Q D 1 2 + =
Q2Q1/Q0X 00 01 11 10 1 x

7. Next State flip-flop input table for second State Assignment
Present State
Next State
D flip-flop Inputs
Output
X=0
X=1
001
110
010 1
011
100

8. X Q D + = X Q x D + = Q2Q1/Q0X 00 01 11 10 x 1 Q2Q1/Q0X 00 01 11 10 x+ = X Q D 1 2 + =
Q2Q1/Q0X 00 01 11 10 x 1
Q2Q1/Q0X 00 01 11 10 x 1

9. X Q D 1 2 + =
Q2Q1/Q0X 00 01 11 10 x 1

10. Next State flip-flop input table for third State Assignment
Present State
Next State
D flip-flop Inputs
Output
X=0
X=1
000
110
001 1
011
010

11. D = Q x + Q X + Q Q 1 1 D = Q Q x + Q Q X Q2Q1/Q0X 00 01 11 10 1 x1 1 1
Q2Q1/Q0X 00 01 11 10 1 x
Q2Q1/Q0X 00 01 11 10 1 x

12. Q2Q1/Q0X 00 01 11 10 x 1

13. Next State flip-flop input table for third State Assignment
Present State
Next State
D flip-flop Inputs
Output
X=0
X=1
000
110
001 1
011
010

14. D = Q Q x + Q Q X D = Q x + Q X + Q Q 1 1 1 Q2Q1/Q0X 00 01 11 10 1 x1 1 1
Q2Q1/Q0X 00 01 11 10 1 x
Q2Q1/Q0X 00 01 11 10 1 x

15. D = Q Q Q x + Q X + Q Q + Q X 2 1 2 1 1
Q2Q1/Q0X 00 01 11 10 1 x

16. Karnaugh Map for J2 and K2 inputs
Q2Q1/Q0 1 00 x 01 11 10
Q2Q1/Q0 1 00 x 01 11 10 1 2 = Q J 1 2 = Q K

17. Karnaugh Map for J0 and K0 inputs
Q2Q1/Q0 1 00 x 01 11 10
Q2Q1/Q0 1 00 x 01 11 10

18. Implementation of the Moore Machine

19. Timing diagram of the Moore Machine

20. Karnaugh Map for J1 and K1 inputs
Q2Q1/Q0 1 00 x 01 11 10
Q2Q1/Q0 1 00 x 01 11 10 1 = J 1 = Q K

21. State diagram of a Moore Machine

22. Next-State table of the Moore Machine
Present State
Next State Q2 Q1 Q0 1

23. J-K flip-flop input table for the Moore Machine
Present State
Next State
J-K flip-flop inputs Q2 Q1 Q0 J2 K2 J1 K1 J0 K0 1 x

24. State diagram of a Mealy Machine

25. Next-State table of a Mealy Machine
Present State
Next State
Output
X=0
X=1 a b
011
111 c
001 d
010 e
100 f
110

26. State Assignments for the Mealy Machine
Present State
Next State
X=0
X=1
000
001
011
010
110
100

27. J-K flip-flop input table for the Moore Machine (X=0)
Present State
Next State
X=0
J-K flip-flop inputs
Output Q2 Q1 Q0 J2 K2 J1 K1 J0 K0 O2 O1 O0 x 1

28. J-K flip-flop input table for the Moore Machine (X=1)
Present State
Next State
X=1
J-K flip-flop inputs
Output Q2 Q1 Q0 J2 K2 J1 K1 J0 K0 O2 O1 O0 1 x

29. Karnaugh Map for J0 and K0 inputs
Q2Q1/Q0 1 00 x 01 11 10
Q2Q1/Q0 1 00 x 01 11 10

30. Karnaugh Map for J2 and K2 inputs
Q2Q1/Q0X 00 01 11 10 1 x
Q2Q1/Q0X 00 01 11 10 x 1 X Q J 1 2 = X Q K 1 2 =

31. Karnaugh Map for J1 and K1 inputs
Q2Q1/Q0X 00 01 11 10 1 x
Q2Q1/Q0X 00 01 11 10 x 1 X Q J 1 = 2 1 + = Q K

32. Karnaugh Map for J0 and K0 inputs
Q2Q1/Q0X 00 01 11 10 1 x
Q2Q1/Q0X 00 01 11 10 x 1 X Q J 1 2 = X Q K 1 =

33. Karnaugh Map for J1 and K1 inputs
Q2Q1/Q0X 00 01 11 10 x 1
Q2Q1/Q0X 00 01 11 10 1 x J = Q X K = Q X 1 1 2

34. X Q O + = X Q O 1 2 + = Q2Q1/Q0X 00 01 11 10 1 x Q2Q1/Q0X 00 01 11 101 2 + = X Q O 1 2 + =
Q2Q1/Q0X 00 01 11 10 1 x
Q2Q1/Q0X 00 01 11 10 1 x

35. Karnaugh Map for O2, O1 and O0 outputs
Q2Q1/Q0X 00 01 11 10 1 x X Q O 1 2 + =

36. Karnaugh Map for J1 and K1 inputs
Q2Q1/Q0 1 00 x 01 11 10
Q2Q1/Q0 1 00 x 01 11 10

37. Implementation of the Mealy Machine

38. Timing diagram of the Mealy Machine

39. Implementation of the Moore Machine

40. Timing diagram of the Moore Machine

41. Recap Design of Up/Down Counter State Diagram Next-State Table
Flip-flop transition table
Flip-flop input table
Karnaugh maps
Logical expressions for flip-flop inputs
Sequential circuit Implementation

42. Recap State Reduction State Diagram
Input/Output sequence using original state diagram
Next-State table reduction
Reduced State Diagram
Input/Output sequence using reduced state diagram

43. State Assignment State Assignment Table (tab 1)
Flip-flop input table & K map for 1st assignment (tab 2)
Flip-flop input table & K map for 1st assignment (tab 3)
Flip-flop input table & K map for 1st assignment (tab 4)

44. Moore Machine State Diagram (fig 1) Next-State Table (tab 5)
J-K flip-flop Input Table (tab 6)
Karnaugh Maps (tab 7a, 7b, 7c)
Implementation (fig 2a)
Timing diagram (fig 2b)

45. Mealy Machine State Diagram (fig 3) Next-State Table (tab 8)
State Assignment (tab 9)
J-K flip-flop Input Table (tab 10a, 10b)
Karnaugh Maps (tab 11a, 11b, 11c, 11d)
Implementation (fig 4a)
Timing diagram (fig 4b)
Output

46. Shift Registers Serial In/Shift Right/Serial Out (fig 1)
Serial In/Shift Left/Serial Out (fig 2)
D flip-flop based Serial Shift Reg. (fig 3a)
Timing diagram (fig 3b)
Universal Serial register (fig 4a)
Timing diagram (fig 4b)

47. Shift Registers Serial In/Parallel Out (fig 5)
Serial In/Parallel Out 74HC164 (fig 6a)
Timing diagram (fig 6b)
Parallel In/Serial Out (fig 7)
Circuit diagram Parallel In/Serial Out (fig 8)
74HC165 (fig 9)