1. This is the Widlar Iref generator.
VDD
VDD M3 M4
This is the Widlar Iref generator.
Can make M1, M3, and M4 to have similar Veff, but M2 has smaller Veff.
A popular choice: W2=4W1  Veff2 = 0.5Veff1;
Or W2=2W1  Veff2 = 0.707Veff1.
R = (Veff1 – Veff2)/Iref
Needs start-up circuit. M1 M2

2. Start-up circuit in the HW replaced RB by a diode connected transistor.
= Vgs1/Iref

3. Start-up circuit consuming no static current

4. Cascoded version for better Vdd insensitivity.M3 M4
Cascoded version for better Vdd insensitivity.
But requires high Vdd:
3Vt+5Veff, if Rss has about one Veff. M1 M2

5. A version that supports low supply voltage: as low as Vt + 5Veff
VDD
VDD
VDD
VDD M4 M3 M1 M2

6. A self-biasing version for mid to low Vdd: 2Vt + 6 Veff
Vbp M7 M8
A self-biasing version for mid to low Vdd:
2Vt + 6 Veff M5 M6
Vcp M9
M11
Vcn
M12
M10 M3 M4 M1 M2
Vnn
Rss

7. Temperature independent reference
Generate a negatively PTAT (Proportional To Absolute Temperature) and a positively PTAT quantities and sum them appropriately.
X can be voltage or current

8. Bandgap voltage reference
Chapter 7 Figure 09
Works in bipolar or BiCMOS

9. A Common way of bandgap reference
This is easily available in digital CMOS
DVBE  kT/q

10. VBE has negative temp coeff at roughly -2
VBE has negative temp coeff at roughly -2.2 mV/°C at room temperature, called CTAT or NTAT
Vt = kT/q is PTAT that has a temperature coefficient of mV/°C at room temperature.
Multiply Vt by a constant K and sum it with the VBE to get
VREF = VBE + KVt
If K is right (2.2/0.08526), temperature coefficient can be zero.

11. In general, use VBE + VPTAT

12. Bandgap reference still varies a little with temp

13. How to get Bipolar in CMOS?

14. Layout
P-active is E
N-well is B
P-substrate is C
Tie both n-well and p-substrate to Vss
Issues: this will not pass LVS
Cadence does not know how to simulate

15. VDD
VDD
VDD
- +
Vref R xR Q nQ nQ

16. Cascoded CM
Cascoded CG
amplifier

17. Chapter 7 Figure 15