1. Sponsored by JILP and Intel’s Academic Research Office
2nd JILP Workshop on Computer Architecture Competitions (JWAC-2): Championship Branch Prediction
Sponsored by JILP and Intel’s Academic Research Office

2. Submissions Two tracks Submissions Distribution
Conditional branch predictor
Indirect branch predictor
Submissions
11 total papers ( 7 conditional, 4 indirect)
Distribution
Asia – 2
Europe - 2
North America - 7

3. Metrics
Performance Ranking
Novel Ideas
Overall Paper Quality
Adherence to Competition Rules

4. Offline program committee meeting
Process
Reviews
2 to 3 reviews per paper
Offline program committee meeting
9 Papers Accepted

5. Types of Algorithms/Enhancements
Base algorithms:
TAGE and ITTAGE
OGEHL
Perceptron predictor
Neural Analog predictor
Loop predictor
Enhancements
Immediate update mimicker
Adaptive Rehashing
Misprediction penalty
Load-branch correlation
Many more: target compression, dynamic fitting, filters etc.

6. Thanks Organizing Committee Web Program Committee Sponsors:
Hongliang Gao, Intel (Chair)
Alaa Alameldeen, Intel
Chris Wilkerson, Intel
Web
Eric Rottenberg
Program Committee
Trevor Mudge, University of Michigan (Chair)
Alaa Alameldeen, Intel
Hongliang Gao, Intel
Daniel Jimenez, UT-San Antonio
Yale Patt, Texas
Andre Seznec, INRIA
Lucian Vintan, University of Sibiu
Chris Wilkerson, Intel
Sponsors:
Intel’s Academic Research Office
JILP