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ELEC 7770 Advanced VLSI Design Spring 2010 Interconnects and Crosstalk

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Presentation on theme: "ELEC 7770 Advanced VLSI Design Spring 2010 Interconnects and Crosstalk"— Presentation transcript:

1 ELEC 7770 Advanced VLSI Design Spring 2010 Interconnects and Crosstalk
Vishwani D. Agrawal James J. Danaher Professor ECE Department, Auburn University Auburn, AL 36849 Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

2 ELEC 7770: Advanced VLSI Design (Agrawal)
Crosstalk Signal noise due to coupling between interconnects. Victim – affected interconnect; Aggressor(s) – noise causing interconnect(s). Principal cause – capacitive coupling in long parallel wires. Transients behavior. Simulation for functional verification. Avoidance by physical design, perpendicular wires, shielding. Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

3 ELEC 7770: Advanced VLSI Design (Agrawal)
Victim and Aggressors Ceff = Cg + 2C0 1 V 2 0→VDD 0V 0V C0 C0 Cg Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

4 ELEC 7770: Advanced VLSI Design (Agrawal)
Victim and Aggressors Ceff = Cg 1 V 2 0→VDD 0→VDD 0→VDD C0 C0 Cg Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

5 ELEC 7770: Advanced VLSI Design (Agrawal)
Victim and Aggressors Ceff = Cg + 4C0 1 V 2 0→VDD VDD→0 VDD→0 C0 C0 Cg Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

6 Crosstalk Induced Capacitance
Victim Neighbor 1 Neighbor 2 Ceff ↑ Cg ↓ Cg + 2C0 Cg + 4C0 Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

7 ELEC 7770: Advanced VLSI Design (Agrawal)
Example Time t < 0 Victim at VDD, both neighbors at VDD Charge on victim = Cg VDD Time t = 0 Both neighbors switch, VDD → 0 Victim’s effective capacitance, Cg + 4C0 Victim’s voltage = Cg VDD/(Cg + 4C0) < VDD Time t > 0 Victim charges to VDD Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

8 ELEC 7770: Advanced VLSI Design (Agrawal)
Example (Cont.) VDD Victim’s voltage Cg VDD/(Cg + 4C0) Time, t Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

9 ELEC 7770: Advanced VLSI Design (Agrawal)
Reducing Crosstalk GND 1 VDD 2 GND Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

10 ELEC 7770: Advanced VLSI Design (Agrawal)
References J. E. Ayers, Digital Integrated Circuits Analysis and Design, Second Edition, Boca Raton: CRC Press, 2010, Chapter 7. X. Chen and N. A. Touba, “Fundamentals of CMOS Design,” Chapter 2, L.-T. Wang, Y.-W. Chang and K.-T. Cheng (Editors), Electronic Design Automation, Morgan-Kaufmann, pp H. Grabinski, Interconnects in VLSI Design, Springer, 2000. Spring 10, May 4 ELEC 7770: Advanced VLSI Design (Agrawal)

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