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SOC Design Lecture 4 Bus and AMBA Introduction.

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Presentation on theme: "SOC Design Lecture 4 Bus and AMBA Introduction."— Presentation transcript:

1 SOC Design Lecture 4 Bus and AMBA Introduction

2 Road without Traffic Lights

3 Communication between Multiples

4 Bus bus

5 Two Types of Connections
Register Register Register Register 화면 내 공간적 유사성을 보여주는 그림 삽입 필요 Register Register Register Register Register Register Point-to-Point Connection Common Bus-based Connection

6 AMBA Stands for Advanced Microcontroller Bus Architecture
Developed by ARM in 1990s (England) ARM also developed ARM RISC which is now the mostly widely used RISC core and that makes AMBA most popular BUS in SOC world.

7 Typical AMBA System ASB is not used these days.

8 Key AMBA Version AMBA 2.0 : AHB, APB, ASB AMBA 3.0 : AXI

9 Master and Slave Concept
화면 내 공간적 유사성을 보여주는 그림 삽입 필요 A can initiate a data transfer. (Write operation in this case.) B only responses to a A’s request. A is called a master and B is called a slave.

10 How about read operation?
Which one is a master?

11 Bus Again In such simple case we do not need a bus.

12 AMBA for Multiple Masters & Slaves
AMBA consists of Master, Slave, Arbiter, Mux, and Decoder. HADDR is the address from master to slave. HWDATA is the data from master to slave. HRDATA is the data from slave to master.

13 Number of Cases about BUS
Single Master, Single Slave Multi Master, Single Slave Single Master, Multi Slave Multi Master, Multi Slave 화면 내 공간적 유사성을 보여주는 그림 삽입 필요

14 Multi Master, Single Slave (MMSS)
화면 내 공간적 유사성을 보여주는 그림 삽입 필요 There’s a Mux. How do we make a “Master Selection” signal?

15 Arbiter 화면 내 공간적 유사성을 보여주는 그림 삽입 필요 When a master wants to transfer data, it sends a request signal to arbiter. If arbiter grants the request, then the master transfers data.

16 Single Master, Multi Slave (SMMS)
화면 내 공간적 유사성을 보여주는 그림 삽입 필요 There’s a Mux, but situation is different from MMSS case. How do we make a slave selection signal?

17 Decoder 화면 내 공간적 유사성을 보여주는 그림 삽입 필요 Slave A & B must have a different address. ex) Slave A : 0x0 ~ 0x3FFF, Slave B : 0x4000 ~ 0x7FFF Decoder decodes an address from master, and make a selection signal.

18 AMBA for Multiple Masters & Multiple Slaves

19 AMBA Signals Signal Description HRESET Reset HADDR Address HWDATA
Data from master to slave HWRITE Write Enable HRDATA Data from slave to master HREADY Indicates slave is ready HREQUES Tx Request from Master number x to Arbiter HGRANTx Grant from Arbiter to Master number x HSELx Section Signal from Decoder to Slave …

20 What about human laws? There are millions of laws. Do you have to do all the legal actions everyday? No. You just need to do what you want. Just do not violate the laws. So, if you need a simple job, you can use a few AMBA signals only. Let’s find the “minimal set” of AMBA signal for our goal.

21 Single Master Single Slave (SM SS)

22 SM SS Write and Read HCLK HADDR HWRITE HWDATA

23 AXI

24 Channels for AXI Read Address Channel (AR….) Read Data Channel (R…..)
Write Address Channel (AW….) Write Data Channel (W…..) Write Response Channel (B….)

25 AHB vs. AXI AHB AXI

26 AXI Read Concept

27 Read Address Channel Signal

28 Read Data Channel Signal

29 Read Address and Data

30 Write Address Channel Signal

31 Write Data Channel Signal

32 Write Address and Data

33 Write Response Channel Signal

34 Write Address, Data and Response

35 NOC (Network On a Chip)

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