1. Team Brian Leslie
Tuesday,
January 23, 2007

2. Progress Thus Far Began implementation of array multiplier
Designed memory interface
Store
Load
Reviewed pipeline datapath and control
Updated timeline and team webpage

3. Array Multiplier

4. Store Interface

5. Load Interface

6. Open Question Does the memory component require
word-aligned addresses?
No?
Yes?
If memory address is 0x1, will it return the word 0x1 – 0x4?
Any suggestions for determining location of address relative to word boundaries?

7. Plan for This Week Make major progress on ALU (All)
Organize instructions into functional categories
Build control signal table
Implement a working schematic
Finish and test memory interface (Ben, Brian)
Incorporate class suggestions
Address remaining issues with Avery on Thursday
Design periphery (Stephen)
N-bit MUXes, zero/sign extender