1. EET107/3 DIGITAL ELECTRONICS 1
Chapter 2:
Functions Of Combinational Logic (Part3)

2. 2.3 MUX / DEMUX
Multiplexers
Demultiplexers

3. Multiplexer Data selector
2 inputs multiplexer
Data selector
SELECT input code determines which input is transmitted to output Z.

4. Multiplexer
4 inputs multiplexer

5. Multiplexer
Block diagram 4-to-1 MUX

6. Multiplexer Larger multiplexers can be constructed from smaller ones.
An 8-to-1 multiplexer can be constructed from smaller multiplexers as shown:

7. Multiplexer
Application Example:

8. Demultiplexer
Data input is transmitted to only one of the outputs as determined by select input code

9. Demultiplexer
1-line-to-8-line demultiplexer

10. Demultiplexer
Example: 1- to -4 Demultiplexer

11. Mux-Demux Application: Example
This enables sharing a single communication line among a number of devices.
At any time, only one source and one destination can use the communication line.

12. 2.4 Parity Generator/Checkers
Error Detection
Odd Parity
Even Parity

13. Error-Detection
A parity bit is a scheme for detecting errors during transmission of binary info.
A parity bit is an extra bit included with the binary message to make the number of 1’s either odd or even.
The message, including the parity bit, is transmitted and then checked at the receiving end for errors.
An error is detected if the checked parity does not correspond to the one transmitted.
The circuit that generates the parity bit in the transmitter is a parity generator.
The circuit that checks the parity bit in the receiver is a parity checker.

14. Error-Detection Parity generator truth table
* For odd parity, the bit P is generated so as to make the number of 1’s odd (including P) X Y Z P 1

15. Error-Detection Parity checker truth table
* The three-bit message (X, Y, Z) and parity bit (P) are transmitted to their destination, where they are applied to a parity checker circuit. An error occurs during transmission if the parity of the four bits is even, since the binary info transmitted was originally odd. The output C of the parity checker should be a 1 when an error occurs, i.e. when the number of 1’s in the four inputs is even. X Y Z P C 1

16. Error-Detection
Parity is used in digital circuits to check for errors in transmission.
In Four bit transmission a parity bit is added to make the fifth bit.
In a eight bit transmission a parity bit is added to made a ninth bit.

17. ODD Parity
In ODD parity when we add the bits together disregarding weight we get or want to get an odd number.
is a four bit message add a parity bit to make it odd
Odd parity is satisfied
is an eight bit message add a parity bit to make it odd
Odd parity is satisfied
Parity bit

18. EVEN parity
In EVEN parity when we add the bits together disregarding weight we get or want to get an even number.
is a four bit message add a parity bit to make it even
Even parity is satisfied
is an eight bit message add a parity bit to make it even
Even parity is satisfied
Parity bit

19. How to generate a parity bit
Use exclusive ORs and Exclusive NORs

20. How to make a parity checker

21. Odd or even parity
0 out of a parity checker means the parity checks and all is ok
1 out of a parity checker means there is an error

22. END OF CHAPTER 2