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Performance Analysis (Clock Signal) مرتضي صاحب الزماني
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Unbalanced delays Logic with unbalanced delays leads to inefficient use of logic: short clock period long clock period مرتضي صاحب الزماني
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Flip-flop-based system performance analysis
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Flip-flop-based system model
Clock signal is perfect (no rise/fall), period P. Clock event on rising edge. Setup time s. Time from arrival of combinational logic event to clock event. Propagation time p. Time for value to go from flip-flop input to output. Worst-case combinational delay C. Time from output of flip-flop to input. مرتضي صاحب الزماني
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Clock parameters مرتضي صاحب الزماني
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Clock period constraint
P >= p + C + s. s C مرتضي صاحب الزماني
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Clock with rise/fall tr is large because the clock wire is long and has high capacitance. مرتضي صاحب الزماني
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Rise/fall clock period constraint
P >= tr + p + C + s s tr C مرتضي صاحب الزماني
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Skew Skew: relative delay between events.
Clock skew: can harm any sequential system. مرتضي صاحب الزماني
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Clock skew Clock must arrive at all memory elements in time to load data. مرتضي صاحب الزماني
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Clock skew in system D Q logic d D Q مرتضي صاحب الزماني
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Clock skew analysis model
s12 = d1 – d2 Assume d1 > d2 (s12 > 0) φ مرتضي صاحب الزماني
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Skew and clock period tsu= tr = 0
If clock arrives at FF1 after FF2, then there is less time for the signal to propagate through the combinational logic. Given clock period, determine allowable skew: P >= D2 + s12 مرتضي صاحب الزماني
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Clock distribution Often one of the hardest problems in clock design.
Fast edges. Minimum skew. مرتضي صاحب الزماني
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Clock skew example 10 ps 10 ps 20 ps 20 ps 30 ps 30 ps
D Q D Q 10 ps 10 ps 20 ps 20 ps 30 ps 30 ps مرتضي صاحب الزماني
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Clock Skew مرتضي صاحب الزماني
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Clock Routing Problem مرتضي صاحب الزماني
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H-Tree Based Algorithm
16 points 4 points مرتضي صاحب الزماني
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MMM Algorithm - Jackson, Srinivasan and Kuh, DAC 1990.
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MMM Steps مرتضي صاحب الزماني
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Geometric Matching Algorithm
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Geometric Matching Algorithm
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Weighted Center-Based Algorithm
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Weighted Center-Based Algorithm
× Tapping Point Selection مرتضي صاحب الزماني
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Observation Do we really need to make the skew zero for all flip-flops? Not many clean and/or optimal techniques work in this less constrained regime Y. Chen, A.B. Kahng, G. Qu,A. Zelikovsky, “The Associative Clock Routing Problem,” ACM/ IEEE Design Automation Conference, 1999. مرتضي صاحب الزماني
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