1. Updated Thermal Model Description
Rev 01
6/6/2017
Yueming Li, Thermal Engineer, Facebook
John Fernandes, Thermal Engineer, Facebook
Jia Ning, Hardware Engineer, Facebook

2. Changes based on community’s feedback
ASIC
Use a generic 2-resistor model by modifying junction to case & junction to board resistances
Rjc = 0.4 C/W
Rjb = 10 C/W
PCB
Rather than layer definition, PCB is modeled as bulk cuboid with orthotropic conductivity
In-plane conductivity: 34 W/(m-K)
Normal conductivity: 0.33 W/(m-K)
QSFP model
Update to a more representative/detailed model
Use a blocker to prevent air from bypassing underneath the baseboard
Based on the changes, updated models were uploaded with initial simulation results
Special thanks to Dell, Mellanox & Intel for their suggestions and help with the model!

3. Updated Cases for CFD - Input

4. Simulation Results – Output
Grid independence study was conducted for each model
“D” cases report lower ASIC temperatures and higher QSFP temperatures compare to “A” cases
Cold-aisle cases seem feasible even with smaller form-factor 7a
QSFP temperature is the gating factor for hot-aisle cases
DRAM appears to not be a gating issue

5. Simulation Results – Hot-aisle cases
D5: hot-aisle, no DRAM, 20W ASIC, 150LFM

6. Simulation Results – Hot-aisle cases
Approach temperature to QSFP modules is around °C
D5: hot-aisle, no DRAM, 20W ASIC, 150LFM

7. Discussion Topics
Bypass in between Mezz PCB top clearance (2.9mm) can be optimized by I/O shield (to be discussed)
Stand-by power and cooling solutions
Estimates place this value at ≤ 50% of max power
Stand-by power for optical module?
Case temperature spec of 85°C for QSFP modules seems improbable
Mellanox propose to consider 70°C as a target during thermal simulations
Large fail region for hot-aisle cases indicates need for better cooling of QSFP modules
Consider adding heat sink to QSFP port/cage?
Any existing design that can be leveraged?
Wind tunnel specification and standard monitor points for vendors to share test data with adopters (system vendors)