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All Programmable FPGAs, SoCs, and 3D ICs
Part II. Understanding the Role of Hardware Description Languages 11 December 2012 Clive “Max” Maxfield
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Creating a Program for an MCU
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Creating a Design for an FPGA
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Things Happen Sequentially in S/W
Pseudo-code example of regular (sequential) programming language like C/C++
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Things Happen Concurrently in H/W
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HDLs Capture Concurrency
Pseudo-code example of HDL like Verilog or VHDL
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Simulation and Synthesis
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A Honking Big S/W Program
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A Honking Big H/W Design
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Procedures and Functions in S/W
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The Way the S/W Program Executes
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Blocks (Modules) in H/W
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The Way the H/W Could Run
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Multiple S/W Proc/Func Calls
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Multiple H/W Block Instantiations
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Multiple H/W Block Instantiations…
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Multiple H/W Block Instantiations…
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Different Levels of Abstraction
Additional Terms Functional Behavioral Structural
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Different Levels of Abstraction (cont.)
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The Origins of HDLs A cornucopia of languages SPICE VHDL / Verilog
UDL/I Superlog / SystemVerilog Bluespec SystemVerilog (BSV) MyHDL SystemC
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More Information / Further Reading
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