1. Programmable Logic Devices
Lecture No. 19
Programmable Logic Devices
Asalam O Aleikum students. I am Waseem Ikram.
This is the ninteenth lecture in a series of 45 lectures on Digital Logic Design.

2. Recap Multiplexer 2-input, 4-bit Mux 8-input Mux 16-input Mux
3 minute

3. Recap Multiplexer Applications 2-Digit Mux based display circuit
Parallel to Serial Conversion
Function Generators
Operation Sequencing
3 minutes
6 minutes

4. Demultiplexer 1-to-4 Demultiplexer (fig 1) ALU to Register connection
Series to Parallel Converter (fig 2)
4 minutes
10 minutes

5. PLDs Programmable OR/AND gate Arrays (fig 3)
Programmed OR/AND gate arrays (fig 4)
PLD types
PROM (fig 5)
PLA (fig 6)
PAL (fig 7)
GAL (fig 8)
8 minutes
24 minutes

6. PALs PAL programmed for SOP (fig 9)
PAL representation by simpler ckt. (fig 10)
PAL programmable outputs (fig 11)
PAL Combinational o/p (fig 12a)
PAL Combinational i/p-o/p (fig 12b)
PAL Programmable Polarity (fig 12c)
PAL Identification (fig 13)
10 minutes
34 minutes

7. PLAs PLA circuit (fig 14) PLA Programming (fig 15)
Programming PLA for 0 and 1 (fig 16)
Odd-Prime number checker (fig 17)
8 minutes
42 minutes