2. Combinatorial Logic Circuit
Digital Systems
Section 5
Combinatorial Logic Circuit

3. Terminology of Boolean Expression
Lecture
Digital Systems
Terminology of Boolean Expression
Variable: element of equation which representing the value 0 or 1.
Literal: appearance of a variable within a term, in true or complemented form.
Product term: product of literals.
Sum-of-product terms: mathematical expression in which addition operators are applied to terms which are expressed by multiplication operator.
Minterm: product term with every literal appearing exactly once, whether in true or complemented form.
Sum term: sum of literals.
Product-of-sum terms: mathematical expression in which multiplication operators are applied to terms which are expressed by addition operator.
Maxterm: sum term with every literal appearing exactly once, whether in true or complemented form.

4. Terminology of Boolean Expression
Lecture
Digital Systems
Terminology of Boolean Expression
Three-variable Minterms and Maxterms

5. Terminology of Boolean Expression
Lecture
Digital Systems
Terminology of Boolean Expression
Given an equation: F(a,b,c) = a’bc + abc’ + ac + c
Then:
The equation F has 3 variables: a, b, c.
Literal a appears 3 times, literal b 2 times, and c 4 times.
There are 4 product terms: a’bc, abc’, ac, and c.
The equation F is written in sum-of-products form. All 4 terms only uses multiplication, and they are summed altogether.
Although F has 4 product term, it has only 2 minterms: a’bc and abc’, where all 3 variables appear, whether in true or complemented form.

6. Lecture
Digital Systems
Canonical Form
For large inputs (≥ 4), the use of truth tables is not practical anymore.
Another way to uniquely describe a Boolean function is through Canonical Form.
There are two types of canonical form:
Sum-of-Products (SoP): disjunction/ sum of minterms, obtained by ORing all minterms.
Notation = Σ(mi)
Product-of-Sum (PoS): conjunction/ product of all maxterms, obtained by ANDing all maxterms.
Notation = π(Mi)

7. Canonical Sum-of-Product
Lecture
Digital Systems
Canonical Sum-of-Product
Given an equation: F = a’bc + abc’ + ac + c
In order to get the canonical Sum-of-Product, we must expand all product terms to become minterms :
F = a’bc + abc’ + a(b+b’)c + (a+a’)(b+b’)c
F = a’bc + abc’ + abc + ab’c + abc + a’bc +ab’c + a’b’c
F = a’bc + abc’ + abc + ab’c + a’b’c

8. Canonical Product-of-Sum
Lecture
Digital Systems
Canonical Product-of-Sum
Given an equation: F = (a+b’)(a+c)
In order to get the canonical Product-of-Sum, we must expand all sum terms to become maxterms :
F = [(a+b’)+cc’][(a+c)+bb’]
F = (a+b’+c)(a+b’+c’)(a+b+c)(a+b’+c)
F = (a+b’+c) (a+b’+c’) (a+b+c)

9. Converting Truth Table to SoP and PoS
Lecture
Digital Systems
Converting Truth Table to SoP and PoS
To obtain SoP, sum all minterms with output F = 1:
F = Σ(m1,m4,m5,m6)
F = Σm(1,4,5,6)
FSoP = A’B’C + AB’C’ +AB’C + ABC’ A B C F 1
To obtain PoS, multiply all maxterms with output F = 0:
F = π(M0,M2,M3,M7)
F = πM(0,2,3,7)
FPoS = (A+B+C)(A+B’+C)(A+B’+C’)(A’+B’+C’)
Check FSoP and FPoS for (A,B,C) = (1,0,0) ?

10. Exercise: SoP and PoS Previously we obtain
Lecture
Digital Systems
Exercise: SoP and PoS
Previously we obtain
FSoP = A’B’C + AB’C’ +AB’C + ABC’
Show that it can be simplified to
FSoP = B’C + AC’. A B C F 1
Previously we obtain
FPoS = (A+B+C)(A+B’+C)(A+B’+C’)(A’+B’+C’)
Show that it can be simplified to
FPoS = (A+C)(B’+C’).
SoP and PoS are the fastest way to obtain a Boolean expression of a function.
However, they do not guarantee a minimal realization

11. Another Example: Sum-of-Product
Lecture
Digital Systems
Another Example: Sum-of-Product
Obtain the SoP of the following truth table and draw the logic circuit based on the SoP.
Simplify the SoP to the smallest possible implementation.
Truth Table A B C G 1
A’BC
Sum-of-Product
GSoP = A’BC + ABC’ + ABC
ABC’
ABC

12. Another Example: Sum-of-Product
Lecture
Digital Systems
Another Example: Sum-of-Product
Sum-of-Product
GSoP = A’BC + ABC’ + ABC
Logic Circuit
Count the number of gates and gate inputs in this circuit. ?

13. Another Example: Sum-of-Product
Lecture
Digital Systems
Another Example: Sum-of-Product
Simplify the SoP
G = A’BC + ABC’ + ABC
= A’BC + ABC’ + ABC + ABC (Idempotent)
= (A + A’)BC + AB(C + C’) (Distributive)
= (1·BC) + (AB·1) (Complement)
= AB + BC (Identity)
The reduced function can now be implemented with less hardware, as shown below.
G = AB + BC
Count the number of gates and gate inputs in this circuit. ?

14. Example: Sum-of-Product
Lecture
Digital Systems
Example: Sum-of-Product
Determine the canonical Sum-of-Product of F = ab+a’.
F = ab + a’b + a’b’ A
Determine the canonical Sum-of-Product of F = ABC + ABC’ + A’C.
F = ABC + ABC’ + A’BC + A’B’C A

15. Example: Product-of-Sum
Lecture
Digital Systems
Example: Product-of-Sum
Determine the canonical Product-of-Sum of F = ab+a’.
F = (a’ + b) A
Determine the canonical Product-of-Sum of F = ABC + ABC’ + A’C.
F = (A’+B’+C’) (A’+B+C’) (A’+B+C) (A’+B+C’) A

16. Application of SoP: BCD to 7-Segment Converter
Lecture
Digital Systems
Application of SoP: BCD to 7-Segment Converter
Sum-of-Products:
a = A’B’C’D’ + A’B’CD’ + A’B’CD + A’BC’D+ A’BCD’ + A’BCD + AB’C’D’ + AB’C’D
b = A’B’C’D’ + A’B’C’D + A’B’CD’ + A’B’CD + A’BC’D’ + A’BCD + AB’C’D’ + AB’C’D

17. Application of SoP: Water Level Sensor
Lecture
Digital Systems
Application of SoP: Water Level Sensor
A flood sensor uses four-bit analog to digital converter. One step of the binary number corresponds to 10 cm of water level. The alarm must turn on if the water level is 70 cm or higher.
FSoP = A’BCD + AB’C’D’ + AB’C’D +
AB’CD’ + AB’CD + ABC’D’ + ABC’D + ABCD’ + ABCD
After simplification, it can be proven that
FSoP = A + BCD

18. Example: Boolean Function
Lecture
Digital Systems
Example: Boolean Function
Built a circuit that will produce the function G = A·B + A’·B·C’.
Write down also its truth table.

19. Minimum-Cost Realization
Lecture
Digital Systems
Minimum-Cost Realization
Neither SoP nor PoS guarantees a minimum-cost realization.
In stead of these two-level forms, in some cases a multi-level form is better.
In practice, any circuit can be implemented only by using NAND and NOR Gates. NAND and NOR Gates provide higher speed, require less power, and can be built with less number of transistors.
Nevertheless, SoP and PoS are the basis for development of circuit minimization methods.
Converting from SoP and PoS to NAND and NOR circuits is straightforward and easy.

20. Minimum-Cost Realization
Lecture
Digital Systems
Minimum-Cost Realization
A formula to calculate cost may include the following factors:
Number of gates
Number of gate inputs
Number of transistors
Area of the circuit
Routing / wiring cost
Critical path delay
Minimum-cost realization can be done by using several methods:
NAND/NOR equivalent
Boolean algebra simplification
Karnaugh map
Quine-McCluskey algorithm

21. Example: Minimum-Cost Realization
Lecture
Digital Systems
Example: Minimum-Cost Realization
Given the following truth table, design the circuit A B F 1
From the truth table, we now write the Sum-of-Product: F1 = A’B’ + A’B + AB
We can now create the logic circuit:
1st possibility

22. Example: Minimum-Cost Realization
Lecture
Digital Systems
Example: Minimum-Cost Realization
We can simplify the Boolean expression and obtain different synthesis result: F2 = A’B’ + A’B + AB
F2 = A’(B’ + B) + AB (Distributive)
F2 = A’ + AB (Complement)
F2 = A’ + B (Elimination)
2nd possibility

23. Example: Minimum-Cost Realization
Lecture
Digital Systems
Example: Minimum-Cost Realization
Logic circuits should be implemented by using as few as logic gates as possible. Optimal implementation will directly affect speed, resource, and power consumption.
One formula of how to calculate cost is:
Cost = Σ(gates) + Σ(gate inputs)
From previous pages, Cost of F1 = = 17 Cost of F2 = = 5

24. Example: Minimum-Cost Realization
Lecture
Digital Systems
Example: Minimum-Cost Realization

25. Functional Completeness
Lecture
Digital Systems
Functional Completeness
A set of Boolean operators is called functionally complete if the set can be used to express all possible logic functions by combining members of the set.
Some sets of logic operators with functional completeness are:
AND and NOT
OR and NOT
NAND
NOR

26. Lecture
Digital Systems
NAND and NOR Gates
NAND Gates
NOR Gates

27. NAND and NOR Gates: Inverter
Lecture
Digital Systems
NAND and NOR Gates: Inverter X X
Check the truth table of the (tied-together 2-input NAND and NOR Gates ?

28. NAND and NOR Gates: De Morgan’s Theorem
Lecture
Digital Systems
NAND and NOR Gates: De Morgan’s Theorem X Y X Y X Y
(X · Y)’ = X’ + Y’
NAND Gates X Y X Y X Y
(X + Y)’ = X’ · Y’
NOR Gates

29. Completeness of NAND Gate
Lecture
Digital Systems
Completeness of NAND Gate
Any Boolean function can be implemented using NAND Gates only.
NOT Gate  NAND Gate, with 2 inputs tied together.
AND Gate  NAND Gate, followed by NOT Gate
OR Gate  NAND Gate, preceded by NOT Gates

30. Completeness of NOR Gate
Lecture
Digital Systems
Completeness of NOR Gate
Any Boolean function can be implemented using NOR Gates only.
NOT Gate  NOR Gate, with 2 inputs tied together.
OR Gate  NOR Gate, followed by NOT Gate
AND Gate  NOR Gate, preceded by NOT Gates

31. Using NAND Gates to Implement an SoP
Lecture
Digital Systems
Using NAND Gates to Implement an SoP x 1 2 3 4 5 x 1 2 3 4 5 x 1 2 3 4 5

32. Using NOR Gates to Implement a PoS
Lecture
Digital Systems
Using NOR Gates to Implement a PoS x 1 2 3 4 5 x 1 2 3 4 5 x 1 2 3 4 5

33. Example: Realization with NAND Gates
Lecture
Digital Systems
Example: Realization with NAND Gates
For the following SoP circuit, make a circuit realization that only uses NAND Gates. F x1 x3 x2 F x1 x3 x2 x1 x3 x2 F

34. Example: Realization with NOR Gates
Lecture
Digital Systems
Example: Realization with NOR Gates
For the following PoS circuit, make a circuit realization that only uses NOR Gates. F x1 x3 x2 F x1 x3 x2 F x1 x3 x2

35. Example: Realization with NAND Gates
Lecture
Digital Systems
Example: Realization with NAND Gates
For the following circuit, make a circuit realization that only uses NAND Gates. F x1 x3 x2 F x1 x3 x2
Redo this example for the use of NOR Gates ? F x1 x3 x2

36. Exercise: SoP with NAND Gates
Lecture
Digital Systems
Exercise: SoP with NAND Gates
Implement the following SoP function with NAND Gates only.
F = Y’Z + X’YZ
Try the variance where
3-input NAND Gates are allowed
only 2-input NAND Gates are allowed

37. Exercise: XOR with NAND and NOR Gates
Lecture
Digital Systems
Exercise: XOR with NAND and NOR Gates
Implement the XOR Gate using NAND Gates only and NOR Gates only. Hint: Start from the truth table.
Be sure to know the ways A

38. Lecture
Digital Systems
Homework 4 (1/2)
Given F(A,B,C) = Σm(2,3,4,6,7). a) Determine the canonical Sum-of-Products expression for F. b) Determine the canonical Product-of-Sums expression for F.
For the following logic equation Y = KL’ + L’M + KM a) Draw the complete logic diagram from the equation above. b) Give the truth table. c) Give the minterm and maxterm representation (Σm, πM). d) Give the equations for canonical Sum-of-Products and Product-of-Sums.
See next slide.

39. Lecture
Digital Systems
Homework 4 (2/2)
Implement circuit A with NAND Gates only and NOR Gates only.
Circuit A
Implement circuit B with NAND Gates only and NOR Gates only.
Circuit B
Please write your Class number after your Student ID.
Deadline: 1 day before class.
Monday, 2 October 2017 (Class 2).
Tuesday, 3 October 2017 (Class 1).