1. Help! How does cache work?

2. Levels of Memory Fast Slower L1 Cache: Instruction Instr Reg. Memory
Data
Registers
Block sizes change for each layer

3. Direct Mapped Cache There are 4 blocks in cache (artificially small)
Memory 1000s of blocks.
To place a memory block in cache, use hashing:
Cache_block = memory_block modulo 4

4. Direct Mapped Cache Rows are 00, 01, 10, 11 0000 1111
Each Cache block has 4 words or 4 x 4 bytes = 16 bytes
Each cache block addresses 0000 … 1111 = 0..15
The bottom 4 bits of any memory address tells us what column
in cache the data will be found in.
Since we have 4 cache entries, the entries can be numbered
This takes two bits.

5. Direct Mapped Cache Rows are 00, 01, 10, 11 0000 1111
Mapping a memory address into cache:
Remainder:
Tag: helps differentiate memory which maps to same cache block
2 bits: Cache block index: which row to find data in in cache
4 bits: Byte number: which column to find data in in cache

6. Set Associative Cache Problem with Direct Access Cache:
Each memory block has only one fit in cache
cache_block_# = memory_block_# % total_#_cache_blocks
If >=2 memory_blocks share 1 cache_block
Many rewrites from memory -> cache
If we have multiple blocks per cache_block_#
memory_block can store in multiple cache_blocks
Result: fewer cache_block_# (indexes)

7. Set Associative Cache A 4-Way Set Associative cache looks like:
Index
Tag
Data 1
A 2-way Set Associative Cache looks like:
Set Index
Tag
Data 1 2 3

8. Fully Associative Cache
Cache Memory
Fully Associative Cache
For example:
Any memory block can go in any cache block.
When an access occurs, all cache blocks must be compared.
Thus, no index is used or allocated.
If a tag matches, then the memory address is in cache.
Tag
Byte Number
in cache block