1. Microprocessors And Microcontrollers
By: Dr. Attiya Baqai
Semester : 4th , 5th (TL, ES) Assistant Professor,
Course Code : ES256 , ES Department of Electronics, MUET.

2. Dedicated to Specific Functions
IO memory (SFR)
Dedicated to Specific Functions
All AVRs have at least 64, 8 bit I/O locations.
64 byte section is called Standard I/O memory.
AVRs of more than 32 IO pins (ATmega64, ATmega128, ATmega256) have extended I/O for controlling extra ports and extra peripherals

3. Data Memory with Extended I/O

4. SRAM vs EEPROM
SRAM is 8 bit RAM
SRAM also called scratch pad RAM
EEPROM does not lose data while SRAM does when power is off.
EEPROM is used when data is rarely changed like settings, options etc.
SRAM is used when data or parameters are frequently changed.
Data Memory= GPRs+ SFR(I/O Reg)+ SRAM

5. Data Memory size

6. AVR Assembly instructions
Arithmetic and logic
Branch, jump
Data movement
Bit manipulation, bit test

7. AVR Assembly instructions
Move
Bit op.,others
reg1=reg2
MOV
reg=17
LDI
reg=mem
LDS
reg=*mem LD
mem=reg
STS
*mem=reg ST
periperal IN
peripheral
OUT
heap
PUSH
POP
Arithmetic and logic
a<<1
LSL
a>>1
LSR,
Ø C
(not avail. In C)
ROL,
ROR
Status
bits
SEI, CLI, CLZ...
No op.
NOP
a+b
ADD
a-b
SUB
a&b
AND
a|b OR
a++
INC
a--
DEC -a
NEG
a=0
CLR

8. AVR Data Movement Instructions
LDI Rd, K where 16<=d<=31
LDS Rd, K where 0<=d<=31
STS Rr,K where $0000<=k<=$FFFF
You can not copy (store) an immediate value directly into SRAM, this must be done through GPRs.
IN Rd, A where 0<=d<=31, 0<=A<=64
OUT A, Rd
MOV Rd, Rr

9. LDI Instruction Format

10. Instruction size

11. Instruction size

12. Data Format Representation
Hex x0F,$0F
Binary b
Decimal
ASCII ‘2’

13. Assembly Language Program

14. Assembly Language Program

15. AVR Memory mapped vs I/O mapped addresses
$3F
$5F

16. IN vs LDS Advantages of IN

17. LDS (Load direct from data space) STS (Store direct to data space)
Example: Write a program that copies the contents of location 0x80 of RAM into location 0x81.
Example: Add contents of location 0x90 to contents of location 0x95 and store the result in location 0x313.
Solution:
LDS R20, 0x80 ;R20 = [0x80]
STS 0x81, R20 ;[0x81] = R20 = [0x80]
Data Address Space
Solution:
LDS R20, 0x90 ;R20 = [0x90]
LDS R21, 0x95 ;R21 = [0x95]
ADD R20, R21 ;R20 = R20 + R21
STS 0x313, R20 ;[0x313] = R20
Example: Write a program that stores 55 into location 0x80 of RAM.
Example: Store 0x53 into the SPH register. The address of SPH is 0x5E
Solution:
LDI R20, ;R20 = 55
STS 0x80, R20 ;[0x80] = R20 = 55
Example: What does the following instruction do?
LDS R20,2
LDS Rd, addr ;Rd = [addr]
Example:
LDS R1, 0x60
LDS (Load direct from data space)
STS addr,Rd ;[addr]=Rd
Example:
STS 0x60,R ; [0x60] = R15
STS (Store direct to data space)
Solution:
LDI R20, 0x53 ;R20 = 0x53
STS 0x5E, R20 ;SPH = R20
Answer:
It copies the contents of R2 into R20; as 2 is the address of R2.

18. Data Address Space
Example: Write a program that adds the contents of the PINC IO register to the contents of PIND and stores the result in location 0x90 of the SRAM
OUT IOAddr,Rd ;[addr]=Rd
Example:
OUT 0x3F,R12 ;SREG = R12
OUT 0x3E,R15 ;SPH = R15
OUT (OUT to IO location)
IN Rd,IOaddress ;Rd = [addr]
Example:
IN R1, 0x3F ;R1 = SREG
IN R17,0x3E ;R17 = SPH
IN (IN from IO location)
Example:
OUT SPH,R12 ;OUT 0x3E,R12
IN R15,SREG ;IN R15,0x3F
Using Names of IO registers
Solution:
IN R20,PINC ;R20 = PINC
IN R21,PIND ;R21 = PIND
ADD R20,R21 ;R20 = R20 + R21
STS 0x90,R20 ;[0x90] = R20

19. ALU Instructions

20. ALU Instructions using single GPR

21. Simple programs

22. Status Register (SREG)H S V N C Z T I
Carry
Interrupt
oVerflow
Zero
Temporary
Negative
Sign
N+V
Half carry

24. Include Files

25. Program ROM Width

26. Little Endian vs Big Endian War

27. Conditional Jump or Branch instructions

28. Conditional Jump or Branch instructions
State the purpose of this program

29. Conditional Jump or Branch instructions

30. Looping in AVR

31. Looping in AVR

32. Looping in AVR

33. Looping in AVR

34. Thanks!
Any questions ?