1. Buffered tree construction for timing optimization, slew rate, and reliability control
Abstract: With the rapid scaling of IC technology, buffer insertion has become an increasingly critical optimization technique in high-performance design.
The problem is to find minimum-buffer routings for each signal net subject to timing, slew rate, and/or capacitive load constraints. We give novel algorithms for (1) timing-driven buffering of difficult instances characterized by varying polarity requirements and large variations in sink criticalities, and (2) bounded-slew routing with minimum number of buffers. Experimental results on tests both randomly generated and extracted from real designs are encouraging.
Student: Bao Liu
Advisors: Andrew B. Kahng, Chung-Kuan Cheng
URL:
source S3 4 S1 S2 2 12 5 B2 B1 1
SMT topology may be sub-optimal
SMT
Optimum
Buffered SMT 7 3
Optimum solution
U = 8
sink in.cap = buf.in.cap = 1 6
Hanan grid solution
Optimum topology not on Hanan grid
Motivation
Buffer insertion is a fundamental technology used in modern high-performance VLSI design for reducing signal delay, bounding gate rise/fall time, and reducing degradation of signal transition edge
Automating buffer insertion is critical: 800,000-1,000,000 repeaters are needed for top-level interconnect in 50nm technology
Existing algorithms perform poorly on difficult instances characterized by large number of sinks, large variation in sink criticalities, non-uniform sink distribution, and varying polarity requirement + -
Optimum topology
Polarity effect on routing tree topology
Steiner topology
Contributions
Proof that is NP-hard to approximate within a factor better than 2
Near-optimum (2+ε)-approximation algorithm
Improved practical heuristics based on local improvement and clustering
Key idea: simultaneous tree construction and buffering
Comprehensive experimental study comparing proposed heuristics on tests both randomly generated and extracted from real designs.
Timing-Driven Buffering w/ Polarity Constraints
Given:
Find:
Bounded-Slew Minimum-Buffer Routing
Given: a net N and sink/buffer input capacitances
Find: a minimum-cost buffered routing tree for N such that the capacitive load of each buffer and of the source is at most a given upper bound, U.
Hardness Results
Optimal buffering of the Steiner Minimum Tree (SMT) is sub-optimal
Optimum solution not always on Hanan grid
NP-hard to approximate within a factor better than 2
C-Tree Algorithm
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Linear-time algorithm for buffering fixed trees (KM)
Traverse the tree in postorder using DFS
For each edge e, insert buffers on e driving capacitance =U until remaining capacitance is less than U
For each node v, if sub-tree capacitance is more than U, then repeatedly insert buffer right below v on the edge with largest residual capacitance until sub-tree capacitance is less than U
Two-level Steiner tree construction
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2+ε approximation
Compute c-approximate Steiner tree
Add buffers using KM algorithm
Theorem: Cost of resulting buffered tree is within 2c + ε of optimum.
K-center Clustering
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Cut & connect heuristic
Find Steiner tree, add buffers using KM algorithm
If any buffer drives less than U capacitance:
- cut and connect a subtree with this buffer
- relocate buffer if possible to drive capacitance =U
Fig. 6 (a,b,c) here
U = 10
sink in.cap = buf.in.cap = 1
After ‘load filling’, cutting
a subtree from the other
branch and connecting it
to the heaviest branch,
only 1 buffer needed.
RMST + KM, which
leads to 2 buffers needed. 6 5 2 1 1 2 1 3 3 5 2
source
source
1.4
4061 26
-101
Flat Tree
4.1
4089 19 99
P-TreeAT
194
4119 84
P-Tree
4546 10
267
C-Tree
CPU Time
wire
buffers
Worst slack
Algorithm
Clustering heuristic Repeat until source drives at most U:
Find Steiner tree; Add first buffer B using KM algorithm; Fill subtree driven by B with
other sinks up to U capacitance; Replace all sinks driven by B with a single sink B
#terminal U e c&c clustering lower bound
#buffers #buffers %improv. #buffers %improv. #buffers %improv.
Conclusion
Essentially different routers should support buffered routng