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Published byRudolf Falk Modified over 6 years ago
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74HC(HCT)40105 High Speed CMOS Logic 4-Bit x 16-Word FIFO Register
Jeffrey Radaker
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Features Independent Asynchronous Inputs and Outputs
Expandable in Either Direction Reset Capability Status Indicators on Inputs and Outputs Three-State Outputs Shift Out Independent of Three-State Control Balanced Propagation Delay and Transition Times Significant Power Reduction Compared to LSTTL ICs
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Pinout 1: Three State Control 2: Data In Ready 3: Shift In
4-7: Data Input (LSB-MSB) 8: Ground 9: Master Reset 10-13: Data Output (MSB-LSB) 14: Data Out Ready 15: Shift Out 16: Supply Voltage
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Functional Block Diagram
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Performance Propagation Time of 180ns from position 1 to Position 16 and Vice Versa Wide Operating Temperature Range (-55C to 125C) Supply Voltage Range: 2V to 6V for HC Types, 4.5V to 5.5V for HCT Types Direct LSTTL Input Logic Compatibility: VIL=0.8V(Max), VIH=2V(Min)
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Applications Bit-Rate Smoothing CPU/Terminal Buffering
Data Communications Peripheral Buffering Line Printer Input Buffers Auto-Dialers CRT Buffer Memories Radar Data Acquisition
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