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Miller equivalent circuit

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Presentation on theme: "Miller equivalent circuit"— Presentation transcript:

1 Miller equivalent circuit
I2 =Y(V2-V1) =Y(V2+V2/A) =(1+1/A)YV2 Y2=(1+1/A)Y Y I1=I=Y(V1-V2) =Y(V1+AV2) =(1+A)YV1 Y1=(1+A)Y

2 The above is proven by assuming constant A.
But in reality, A depends on Y and connection. Correct use of Miller is quite tricky!

3 v2 = -Av1 v2 Agm1R2 This is for DC.

4 But this is missing the positive zero: z1 = +gm1/Cgd1
v1/vin=1/(1+sRs(Cgs1+(1+gm1R2 )Cgd1)) vo/v1= -gm1/(G2 + s(C2 +Cgd1)) Multiply: vo/vin= -gm1/{(G2 + s(C2 +Cgd1))(1+sRs(Cgs1+(1+gm1R2 )Cgd1))} But this is missing the positive zero: z1 = +gm1/Cgd1  Cgd1 A better approach: first set Rs=0, find TF from gate to vo, as we did before; then use Miller effect, find TF from vin to v1 (left circuit); then multiply together to get TF from vin to vo.  vo/vin = (sCgd1 -gm1)/{(G2 + s(C2 +Cgd1))(1+sRs(Cgs1+(1+gm1R2 )Cgd1))}

5 Zero value time constant:
If a TF=n(s)/d(s) has only real poles d(s)=(1+t1s)(1+t2s)(1+t3s)… =1+(t1+t2+t3+…)s + (t1t2+t2t3+…)s2+… For low frequency, s small, we have d(s)  1+(t1+t2+t3+…)s Hence the lowest freq pole is approximately p1  -1/(t1+t2+t3+…) This only good for low freq, and real poles.

6 Application: Perform series/parallel simplification For each remaining capacitor Ci, find resistance Ri it sees by: short V-source, open I-source, open other caps, and compute R teff = R1C1+R2C2+…

7 C2 is CL||Cdb1||Cdb2 R2 is rds1||rds2 Cgs1 sees Rs, C2 sees R2 For Cgd1, more complex.

8 Resistance seen by Cgd1 can be found by applying a test v3 across Cgd1, finding the resulting current i3, and using R3=v3/i3 R3 = R2 + (1+gm1R2)*Rs teff=RsCgs1+R2C2+R2Cgd1+ (1+gm1R2)*RsCgd1

9 For a differential amplifer: vin+=vic+vid/2, vin-=vic-vid/2
As vid change, Vs=const Vs is virtual ground. left half = -(right half) Can use half circuit: M2 vin- CL M8 M1 vin+ M7 Vyy vo+ vo- Vs VDD VDD VDD Vyy M7 R,C vo+ vo+ CL CL M1 M1 Can further use quarter circuit for analysis with suitable parasitic R, C:

10 VDD VDD Telescopic cascode amplifier Quarter circuit: M7 M5 Vyy Vxx M8 M6 VDD M3 M1 Vbb Vin CL Rb Vo vo- vo+ CL M3 M4 Vbb CL M1 M2 vin+ vin- Vs

11 VDD VDD VDD Vo Vb3 folded cascode amp Vb2 Vb2 Vb3 Vin+ Vin- CL Vb4 Vb1 Vb5 Quarter circuit

12 Both have the same small signal model
VDD M3 M1 Vbb Vin CL Rb Vo VDD Vo Vb3 Both have the same small signal model

13 a a >1 First take Rs = 0, find TF from vg1 to vo
then from TF from vin to vg1, Finally, multiply the two together. Include gs2 Include Cgs2, Cdb1, Csb2 Include ro of I-source if folded a a >1 vg1/vin =1/(1+sRsaCgs1)

14 To find TF from vg1 to vo: Write KCL at vs, KCL at vo, Two equations, eliminate vs, and solve for vo in terms of vg1  vo/vg1

15 ro  rds1*Av2 || RL Av(0)  - gm1ro p1 = - w-3dB = -1/roCout GBW = gm1/Cout z1 = +gm1/Cgd1 p2  -1/{(rds1|| rincg)Cs2} p3  -1/RsaCgs1

16 Design steps: SR, CL  IQ OSR  Veff ranges Ibias or Iref  size current source GBW, CL  gm IQ, gm  (W/L)1, round to nice numbers Feedback to generate VinQ Check Veff, if too large, increase W1, (this leads to over design of gm and GBW) Check Av or ro, if not sufficient, use larger L, and adjust W accordingly to keep the same W/L For cascode structures, modify the steps a little.


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