1. Boolean Algebra

2. AND In order for current to flow, both switches must be closed
Logic notation AB = C
(Sometimes AB = C) A B C 1

3. OR Current flows if either switch is closed Logic notation A + B = C A1

4. Properties of AND and OR
Commutation
A + B = B + A
A  B = B  A
Same as
Same as

5. Commutation Circuit
A  B
B  A
B + A
A + B

6. Properties of AND and OR
Associative Property
A + (B + C) = (A + B) + C
A  (B  C) = (A  B)  C =

7. Properties of AND and OR
Distributive Property
A + B  C = (A + B)  (A + C)
A + B  C A B C Q 1

8. Distributive Property
(A + B)  (A + C) A B C Q 1

9. Notice that the carry results are the same as AND
Binary Addition A B S
C(arry) 1
Notice that the carry results are the same as AND
C = A  B

10. Inversion (NOT) A Q 1
Logic:

11. Exclusive OR (XOR)
Either A or B, but not both
This is sometimes called the inequality detector, because the result will be 0 when the inputs are the same and 1 when they are different.
The truth table is the same as for S on Binary Addition. S = A  B A B S 1

12. Getting the XOR A B S 1
Two ways of getting S = 1

13. Circuit for XOR
Accumulating our results: Binary addition is the result of XOR plus AND

14. Half Adder
Called a half adder because we haven’t allowed for any carry bit on input. In elementary addition of numbers, we always need to allow for a carry from one column to the next. 18 25
3 (plus a carry) 4

15. Half Adder

16. Full Adder
INPUTS
OUTPUTS A B
CIN
COUT S 1

17. Full Adder Circuit

18. Chaining the Full Adder
Possible to use the same scheme for subtraction by noting that
A – B = A + (-B)

19. Binary Counting
Use 1 for ON
Use 0 for OFF =
So our example has = = 43

20. Counting in Binary 1 11
1011 21
10101 2 10 12
1100 22
10110 3 13
1101 23
10111 4
100 14
1110 24
11000 5
101 15
1111 25
11001 6
110 16
10000 26
11010 7
111 17
10001 27
11011 8
1000 18
10010 28
11100 9
1001 19
10011 29
11101
1010 20
10100 30
11110

21. NAND (NOT AND) A B Q 1

22. NOR (NOT OR) A B Q 1

23. DeMorgan’s Theorem
A NAND gate is equivalent to an inversion followed by an OR
A NOR gate is equivalent to an inversion followed by and AND

24. DeMorgan Truth Table A B 1
NAND
NOR

25. Exclusive NOR A B Q 1
Equality Detector

26. Summary for all 2-input gates
Inputs
Output of each gate
 A 
 B 
AND
NAND
 OR 
NOR
XOR
XNOR 1

27. Logic Gates and Symbols
NAND

28. More Gates and Symbols OR
NOR
NOT

29. And More
XOR
NXOR

30. Multi-input Gates

31. Three input OR

32. Logic Gate ICs

33. Example 7400

34. More ICs

35. And More