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EFFICIENT ADDERS TO SPEEDUP MODULAR MULTIPLICATION FOR CRYPTOGRAPHY
Adnan Gutub Hassan Tahhan Computer Engineering Department KFUPM, Dhahran, SAUDI ARABIA
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Abstract Modular multiplication is an essential operation in many cryptography arithmetic operations. This work serves the modular multiplication algorithms focusing on improving their underlying binary adders. Different known adders have been considered and studied. The carry-save adder, carry-lookahead adder and carry-skip adder showed interesting features and trade-offs. The adders VHDL implementations gave some more beneficial details promising for improved crypto designs.
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Modular Multiplication Operation
In many public-key encryption schemes (e.g., RSA, ElGamal & ECC), Modular Multiplication is a basic arithmetic operations heavily used. A B M M. M. C Modular Multiplication: C = A * B mod M where A, B < M Secure System very large operand size too expensive. Straightforward Method: Multiplication then modulus division.
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Binary Adders The last stage in both algorithms does full-length addition on the carry-sum pair which can be performed in hardware through binary adders. Statistics showed that 72% of the instructions perform additions in the data path of a prototypical RISC machine. The carry-lookahead adder and the carry-skip adder were compared in terms of time, area and power.
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Carry-Lookahead Adder
The total delay of the carry-lookahead adder is (log n). There is a penalty paid for this gain: the area increases. The carry-lookahead adders require (n log n) area.
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Carry-Skip Adder The carry-skip adder has a simple and regular structure that requires an area in the order of (n) which is hardly larger then the area required by the ripple-carry adder. The time complexity of the carry-skip adder is bounded between (n1\2) and (log_n). An equal-block-size one-level carry-skip adder will have a time complexity of (n1\2). However, a more optimized multi-level carry-skip adder will have a time complexity of O (log n).
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simplified carry-skip logic
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longest path delay in carry-skip adders
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CLA vs. CSK Using 32-bit operands, a multi-level carry-skip adder was 14 % faster and its power dissipation was 58 % of that of the carry-lookahead adder. Using 64-bit operands, a one-level carry-skip adder was 38% slower and its power consumption is 68 % of the the carry-lookahead adder.
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Conclusion This work studied the modular multiplication problem over large operand sizes. Based on a survey, two implementations for modular multiplication algorithms were modeled using VHDL and synthesized. A time-area analysis of both implementations showed that Koc’s implementation has the potential to be an effective solution in terms of time and hardware requirements. This implementation was improved further.
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Conclusion Carry-save adders give the maximum speedup in computing the partial products since. However, full-length addition on the sum-carry pair needs to be carried out at the last iteration through dedicated binary adder. Two binary adders were studied: the CLA and the CSK. Although the two adders can be of a comparable speed, the CSK requires smaller area and consumes much less power than the CLA.
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